79 + Mcqs in Fet Page 1 McqOptions

1.	In p-channel FETs, the level of VGS is ________ while the level of VDS is ________.
A.	negative, negative
B.	positive, positive
C.	negative, positive
D.	positive, negative
Answer» E.

Discussion

2.	In a universal JFET bias curve, the horizontal axis is ________.
A.	VDS
B.	ID / IDSS
C.	the normalized level
D.	VGS
Answer» D. VGS

Discussion

3.	In a universal JFET bias curve, the vertical scale labeled M is used for finding the solution to the ________ configuration.
A.	fixed-bias
B.	self-bias
C.	voltage-divider
D.	None of the above
Answer» D. None of the above

Discussion

4.	In a universal JFET bias curve, the vertical scale labeled m is used to find the solution to the ________ configuration.
A.	fixed-bias
B.	self-bias
C.	voltage-divider
D.	None of the above
Answer» B. self-bias

Discussion

5.	The level of VDS is typically between ________ % and ________ % of VDD.
A.	0, 100
B.	10, 90
C.	25, 75
D.	None of the above
Answer» D. None of the above

Discussion

6.	In a JFET, the level of ________ is limited to values between 0 V and –VP.
A.	[A].
B.	[B].
C.	[C].
D.	[D].
Answer» E.

Discussion

7.	________ must be considered in the total design process.
A.	Dc conditions
B.	Level of amplification
C.	Signal strength
D.	All of the above
Answer» E.

Discussion

8.	For R2 smaller than ________ k the voltage VD is equal to VDD = 16 V.
A.	3.75
B.	5
C.	12
D.	24
Answer» B. 5

Discussion

9.	In a feedback-bias configuration, the slope of the dc load line is controlled by ________.
A.	RG
B.	RD
C.	VDG
D.	None of the above
Answer» C. VDG

Discussion

10.	In an enhancement-type MOSFET, the drain current is zero for levels of VGS less than the ________ level.
A.	VGS(Th)
B.	VGS(off)
C.	VP
D.	VDD
Answer» B. VGS(off)

Discussion

11.	Specification sheets typically provide ________ for enhancement-type MOSFETs.
A.	the threshold voltage VGS(Th)
B.	a level of drain current ID(on)
C.	an ID(on)
D.	All of the above
Answer» E.

Discussion

12.	In ________ configuration(s) a depletion-type MOSFET can operate in enhancement mode.
A.	self-bias
B.	fixed-bias with no VGG
C.	voltage-divider
D.	None of the above
Answer» D. None of the above

Discussion

13.	In a depletion-type MOSFET, the transfer characteristic rises ________ as VGS becomes more positive.
A.	less rapidly
B.	more rapidly
C.	the same
D.	None of the above
Answer» C. the same

Discussion

14.	The slope of the dc load line in a voltage-divider is controlled by ________.
A.	R1
B.	R2
C.	RS
D.	All of the above
Answer» E.

Discussion

15.	The slope of the dc load line in a self-bias configuration is controlled by ________.
A.	VDD
B.	RD
C.	RG
D.	RS
Answer» E.

Discussion

16.	________ levels of RS result in ________ quiescent values of ID and ________ negative values of VGS.
A.	Increased, lower, less
B.	Increased, higher, less
C.	Increased, higher, more
D.	Increased, less, lower
Answer» B. Increased, higher, less

Discussion

17.	The dc load line is drawn using the equation obtained by applying Kirchhoff's voltage law (KVL) at ________ side loop(s) of the circuit.
A.	the output
B.	the input
C.	both the input and output
D.	None of the above
Answer» C. both the input and output

Discussion

18.	When plotting the transfer characteristics, choosing VGS = 0.5VP will result in a drain current level of ________ IDSS.
A.	0
B.	0.25
C.	0.5
D.	1
Answer» C. 0.5

Discussion

19.	The ratio of current ID to IDSS is equal to ________ for a fixed-bias configuration.
A.	0
B.	0.25
C.	0.5
D.	1
Answer» E.

Discussion

20.	In a fixed-bias configuration, the voltage level of VGS is equal to ________.
A.	VS
B.	VG
C.	VGS(off)
D.	VP
Answer» C. VGS(off)

Discussion

21.	The coupling capacitors are ________ for the dc analysis and ________ for the ac analysis.
A.	open-circuit, low impedance
B.	short-circuit, low impedance
C.	open-circuit, high impedance
D.	None of the above
Answer» B. short-circuit, low impedance

Discussion

22.	For ________, Shockley's equation is applied to relate the input and the output quantities.
A.	JFETs
B.	depletion-type MOSFETs
C.	enhancement-type MOSFETs
D.	JFETs and depletion-type MOSFETs
Answer» E.

Discussion

23.	The controlled variable on the output side of an FET transistor is a ________ level.
A.	current
B.	voltage
C.	resistor
D.	None of the above
Answer» B. voltage

Discussion

24.	The input controlling variable for an FET transistor is a ________ level.
A.	resistor
B.	current
C.	voltage
D.	All of the above
Answer» D. All of the above

Discussion

25.	For the field-effect transistor, the relationship between the input and the output quantities is ________.
A.	linear
B.	nonlinear
C.	3rd degree
D.	None of the above
Answer» C. 3rd degree

Discussion

26.	For the noninverting amplifier, one of the most important advantages associated with using a JFET for control is the fact that it is ________ rather than ________ control.
A.	dc, ac
B.	ac, dc
Answer» B. ac, dc

Discussion

27.	Determine the quiescent values of ID and VGS.
A.	1.2 mA, –1.8 V
B.	1.5 mA, –1.5 V
C.	2.0 mA, –1.2 V
D.	3.0 mA, –0.8 V
Answer» C. 2.0 mA, –1.2 V

Discussion

28.	Calculate VDSQ.
A.	1.0 V
B.	1.50 V
C.	2.56 V
D.	3.58 V
Answer» E.

Discussion

29.	Calculate the value of RD.
A.	2 k
B.	3 k
C.	3.5 k
D.	4.13 k
Answer» E.

Discussion

30.	Given the values of VDQ and IDQ for this circuit, determine the required values of RD and RS.
A.	2 k, 2 k
B.	1 k, 5.3 k
C.	3.2 k, 400
D.	2.5 k, 5.3 k
Answer» D. 2.5 k, 5.3 k

Discussion

31.	Calculate the value of RS. Assume VGSQ = −2V.
A.	0 k
B.	1.68 k
C.	6.81 k
D.	8.5 k
Answer» C. 6.81 k

Discussion

32.	Calculate VCE.
A.	0 V
B.	2 V
C.	3 V
D.	5.34 V
Answer» E.

Discussion

33.	Calculate the value of VDSQ.
A.	0 V
B.	20 V
C.	30 V
D.	40 V
Answer» E.

Discussion

34.	What are the voltages across RD and RS?
A.	0 V, 0 V
B.	5 V, 5 V
C.	10 V, 10 V
D.	20 V, 20 V
Answer» B. 5 V, 5 V

Discussion

35.	Calculate VDS.
A.	0 V
B.	6 V
C.	16 V
D.	11 V
Answer» B. 6 V

Discussion

36.	Calculate VD.
A.	23.0 V
B.	17.0 V
C.	4.6 V
D.	12.4 V
Answer» C. 4.6 V

Discussion

37.	For what value of RS can the depletion-type MOSFETs operate in enhancement mode?
A.	2.4 k
B.	5 k
C.	6.2 k
D.	None of the above
Answer» D. None of the above

Discussion

38.	Determine the value of VDSQ.
A.	3.5 V
B.	4.86 V
C.	7.14 V
D.	10 V
Answer» B. 4.86 V

Discussion

39.	For what value of R2 is VGSQ equal to 1 V?
A.	10 M
B.	100 M
C.	110 M
D.	220 M
Answer» C. 110 M

Discussion

40.	Depletion-type MOSFETs do not permit operating points with positive values of VGS and levels of ID that exceed IDSS.
A.	True
B.	False
Answer» C.

Discussion

41.	At what value of RS does the circuit switch from depletion mode to enhancement mode?
A.	250
B.	500
C.	10 M
D.	None of the above
Answer» B. 500

Discussion

42.	For what value of RD is the voltage across VDS zero?
A.	2.400 k
B.	5.167 k
C.	6.167 k
D.	6.670 k
Answer» C. 6.167 k

Discussion

43.	What is the new value of RD when there is 7 V across VDS?
A.	3 k
B.	3.3 k
C.	4 k
D.	5 k
Answer» C. 4 k

Discussion

44.	Which of the following represents the voltage level of VGS in a self-bias configuration?
A.	VG
B.	VGS(off)
C.	VS
D.	VP
Answer» D. VP

Discussion

45.	Calculate the value of VDS.
A.	0 V
B.	8 V
C.	4.75 V
D.	16 V
Answer» E.

Discussion

46.	Which mode of operation of FET is used, when amplification is needed?
A.	active
B.	saturation
C.	non saturation
D.	linear
Answer» C. non saturation

Discussion

47.	Which voltage increases the channel size?
A.	negative Vgs
B.	positive Vgs
C.	negative Vds
D.	positive Vds
Answer» C. negative Vds

Discussion

48.	The expansion of depletion region in n-channel device makes the channel
A.	narrow
B.	wide
C.	does not affect the channel
D.	cannot be determined
Answer» B. wide

Discussion

49.	Field effect transistor’s conductivity is regulated by
A.	input current
B.	output current
C.	terminal voltage
D.	supply voltage
Answer» D. supply voltage

Discussion

50.	The FET has __________ input impedance.
A.	low
B.	high
C.	all of the mentioned
D.	none of the mentioned
Answer» C. all of the mentioned

Discussion

Explore topic-wise MCQs in Vlsi.

In p-channel FETs, the level of VGS is ________ while the level of VDS is ________.

In a universal JFET bias curve, the horizontal axis is ________.

In a universal JFET bias curve, the vertical scale labeled M is used for finding the solution to the ________ configuration.

In a universal JFET bias curve, the vertical scale labeled m is used to find the solution to the ________ configuration.

The level of VDS is typically between ________ % and ________ % of VDD.

In a JFET, the level of ________ is limited to values between 0 V and –VP.

________ must be considered in the total design process.

For R2 smaller than ________ k the voltage VD is equal to VDD = 16 V.

In a feedback-bias configuration, the slope of the dc load line is controlled by ________.

In an enhancement-type MOSFET, the drain current is zero for levels of VGS less than the ________ level.

Specification sheets typically provide ________ for enhancement-type MOSFETs.

In ________ configuration(s) a depletion-type MOSFET can operate in enhancement mode.

In a depletion-type MOSFET, the transfer characteristic rises ________ as VGS becomes more positive.

The slope of the dc load line in a voltage-divider is controlled by ________.

The slope of the dc load line in a self-bias configuration is controlled by ________.

________ levels of RS result in ________ quiescent values of ID and ________ negative values of VGS.

The dc load line is drawn using the equation obtained by applying Kirchhoff's voltage law (KVL) at ________ side loop(s) of the circuit.

When plotting the transfer characteristics, choosing VGS = 0.5VP will result in a drain current level of ________ IDSS.

The ratio of current ID to IDSS is equal to ________ for a fixed-bias configuration.

In a fixed-bias configuration, the voltage level of VGS is equal to ________.

The coupling capacitors are ________ for the dc analysis and ________ for the ac analysis.

For ________, Shockley's equation is applied to relate the input and the output quantities.

The controlled variable on the output side of an FET transistor is a ________ level.

The input controlling variable for an FET transistor is a ________ level.

For the field-effect transistor, the relationship between the input and the output quantities is ________.

For the noninverting amplifier, one of the most important advantages associated with using a JFET for control is the fact that it is ________ rather than ________ control.

Determine the quiescent values of ID and VGS.

Calculate VDSQ.

Calculate the value of RD.

Given the values of VDQ and IDQ for this circuit, determine the required values of RD and RS.

Calculate the value of RS. Assume VGSQ = −2V.

Calculate VCE.

Calculate the value of VDSQ.

What are the voltages across RD and RS?

Calculate VDS.

Calculate VD.

For what value of RS can the depletion-type MOSFETs operate in enhancement mode?

Determine the value of VDSQ.

For what value of R2 is VGSQ equal to 1 V?

Depletion-type MOSFETs do not permit operating points with positive values of VGS and levels of ID that exceed IDSS.

At what value of RS does the circuit switch from depletion mode to enhancement mode?

For what value of RD is the voltage across VDS zero?

What is the new value of RD when there is 7 V across VDS?

Which of the following represents the voltage level of VGS in a self-bias configuration?

Calculate the value of VDS.

Which mode of operation of FET is used, when amplification is needed?

Which voltage increases the channel size?

The expansion of depletion region in n-channel device makes the channel

Field effect transistor’s conductivity is regulated by

The FET has __________ input impedance.

In p-channel FETs, the level of VGS is while the level of VDS is .

The level of VDS is typically between % and % of VDD.

levels of RS result in quiescent values of ID and negative values of VGS.

The coupling capacitors are for the dc analysis and for the ac analysis.

For the noninverting amplifier, one of the most important advantages associated with using a JFET for control is the fact that it is rather than control.