MCQOPTIONS
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MCQOPTIONS
This section includes 12 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
IN_THIS_TECHNIQUE,_A_SIMPLE_FAULT_MANIFESTS_INTO_MULTIPLE_N_FAULTS.?$ |
| A. | true |
| B. | false |
| Answer» B. false | |
| 2. |
For a NAND gate, struck-at 1 fault in second input line cannot be detected if$ |
| A. | Q is 1 |
| B. | Q is 0 |
| C. | Q changes from 1 to 0 |
| D. | Q changes from 0 to 1 |
| Answer» C. Q changes from 1 to 0 | |
| 3. |
In this iterative test generation method, sequential logic is$ |
| A. | used in the same pattern |
| B. | converted to test logic |
| C. | converted to combinational logic |
| D. | converted to asynchronous logic |
| Answer» D. converted to asynchronous logic | |
| 4. |
Which method is very time consuming? |
| A. | D-algorithm |
| B. | iterative test generation |
| C. | pseudo exhaustive method |
| D. | test generation pattern |
| Answer» C. pseudo exhaustive method | |
| 5. |
Iterative test generation method suits for circuits with |
| A. | no feedback loops |
| B. | few feedback loops |
| C. | more feedback loops |
| D. | negative feedback loops only |
| Answer» C. more feedback loops | |
| 6. |
In an OR gate, if A and B are two inputs and there is struck at 1 fault in B path, then output will be |
| A. | A |
| B. | 0 |
| C. | 1 |
| D. | B’ |
| Answer» D. B‚Äö√Ñ√∂‚àö√ë‚àö¬• | |
| 7. |
Which contributes to the necessary delay element? |
| A. | flip-flops |
| B. | circuit propogation elements |
| C. | negative feedback path |
| D. | shift registers |
| Answer» C. negative feedback path | |
| 8. |
Which is the delay elements for clocked system? |
| A. | AND gates |
| B. | OR gates |
| C. | Flip-flops |
| D. | Multiplexers |
| Answer» D. Multiplexers | |
| 9. |
Outputs are functions of |
| A. | present state |
| B. | previous state |
| C. | next state |
| D. | present and next state |
| Answer» B. previous state | |
| 10. |
Which constitutes the test vectors in sequential circuits? |
| A. | feedback variables |
| B. | delay factors |
| C. | test patterns |
| D. | all input combinations |
| Answer» B. delay factors | |
| 11. |
Sequential circuit includes |
| A. | delays |
| B. | feedback |
| C. | delays and feedback from input to output |
| D. | delays and feedback from output to input |
| Answer» E. | |
| 12. |
Sequential circuits are represented as |
| A. | finite state machine |
| B. | infinite state machine |
| C. | finite synchronous circuit |
| D. | infinite asynchronous circuit |
| Answer» B. infinite state machine | |