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MCQOPTIONS
This section includes 194 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.
| 101. |
Binary multiplication is like decimal multiplication except you deal only with 1s and 0s. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 102. |
The solution to the binary problem 0101 + 1111 is 10100. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 103. |
The binary subtraction 1 – 1 = ________. |
| A. | difference = 0borrow = 0 |
| B. | difference = 1borrow = 0 |
| C. | difference = 1borrow = 1 |
| D. | difference = 0borrow = 1 |
| Answer» B. difference = 1borrow = 0 | |
| 104. |
Solve this BCD problem: 0100 + 0110 = |
| A. | 00010000BCD |
| B. | 00010111BCD |
| C. | 00001011BCD |
| D. | 00010011BCD |
| Answer» B. 00010111BCD | |
| 105. |
What is the correct output of the adder in the given figure, with the outputs in the order: |
| A. | 10111 |
| B. | 11101 |
| C. | 1101 |
| D. | 10011 |
| Answer» B. 11101 | |
| 106. |
What is the most important operation in binary-coded decimal (BCD) arithmetic? |
| A. | addition |
| B. | subtraction |
| C. | multiplication |
| D. | division |
| Answer» B. subtraction | |
| 107. |
When multiplying 13 √ó 11 in binary, what is the third partial product? |
| A. | 1011 |
| B. | 0 |
| C. | 100000 |
| D. | 100001 |
| Answer» C. 100000 | |
| 108. |
Using 4-bit adders to create a 1See Section 6-bit adder: |
| A. | requires 16 adders. |
| B. | requires 4 adders. |
| C. | requires the carry-out of the less significant adder to be connected to the carry-in of the next significant adder. |
| D. | requires 4 adders and the connection of the carry out of the less significant adder to the carry-in of the next significant adder. |
| Answer» E. | |
| 109. |
The summing outputs of a half- or full-adder are designated by which Greek symbol? |
| A. | omega |
| B. | theta |
| C. | lambda |
| D. | sigma |
| Answer» E. | |
| 110. |
The carry propagation delay in full-adder circuits: |
| A. | is normally not a consideration because the delays are usually in the nanosecond range. |
| B. | decreases in a direct ratio to the total number of FA stages. |
| C. | is cumulative for each stage and limits the speed at which arithmetic operations are performed. |
| D. | increases in a direct ratio to the total number of FA stages but is not a factor in limiting the speed of arithmetic operations. |
| Answer» D. increases in a direct ratio to the total number of FA stages but is not a factor in limiting the speed of arithmetic operations. | |
| 111. |
Convert each of the decimal numbers to 8-bit two's-complement form and then perform subtraction by taking the two's-complement and adding. |
| A. | 0001  0011 |
| B. | 0000  1110 |
| C. | 0010  1110 |
| D. | 1110  0000 |
| Answer» C. 0010¬†¬†1110 | |
| 112. |
111010002 is the 2's-complement representation of –24. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 113. |
The truth table for a full adder is shown below. What are the values of X, Y, and Z? |
| A. | X = 0, Y = 1, Z = 1 |
| B. | X = 1, Y = 1, Z = 1 |
| C. | X = 1, Y = 0, Z = 1 |
| D. | X = 0, Y = 0, Z = 1 |
| Answer» C. X = 1, Y = 0, Z = 1 | |
| 114. |
The selector inputs to an arithmetic/logic unit (ALU) determine the: |
| A. | selection of the IC |
| B. | arithmetic or logic function |
| C. | data word selection |
| D. | clock frequency to be used |
| Answer» C. data word selection | |
| 115. |
Determine the two's-complement of each binary number.00110        00011        11101 |
| A. | 11001    11100    00010 |
| B. | 00111    00010    00010 |
| C. | 00110    00011    11101 |
| D. | 11010    11101    00011 |
| Answer» E. | |
| 116. |
Half-adders can be combined to form a full-adder with no additional gates. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 117. |
The two's-complement method is used in computer systems that perform arithmetic. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 118. |
The binary adder circuit is designed to add ________ binary number(s) at a time. |
| A. | 1 |
| B. | 3 |
| C. | 2 |
| D. | 5 |
| Answer» D. 5 | |
| 119. |
A full adder has a carry-in. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 120. |
What is the difference between a full-adder and a half-adder? |
| A. | Half-adder has a carry-in. |
| B. | Full-adder has a carry-in. |
| C. | Half-adder does not have a carry-out. |
| D. | Full-adder does not have a carry-out. |
| Answer» C. Half-adder does not have a carry-out. | |
| 121. |
34FC + AD31 = ________. |
| A. | E22D |
| B. | E31D |
| C. | E21D |
| D. | E42D |
| Answer» B. E31D | |
| 122. |
The range of positive numbers when using an eight-bit two's-complement system is: |
| A. | 0 to 64 |
| B. | 0 to 100 |
| C. | 0 to 127 |
| D. | 0 to 256 |
| Answer» D. 0 to 256 | |
| 123. |
What is the major difference between half-adders and full-adders? |
| A. | Nothing basically; full-adders are made up of two half-adders. |
| B. | Full adders can handle double-digit numbers. |
| C. | Full adders have a carry input capability. |
| D. | Half adders can handle only single-digit numbers. |
| Answer» D. Half adders can handle only single-digit numbers. | |
| 124. |
Which of the following is the primary advantage of using binary-coded decimal (BCD) instead of straight binary coding? |
| A. | Fewer bits are required to represent a decimal number with the BCD code. |
| B. | BCD codes are easily converted from decimal. |
| C. | the relative ease of converting to and from decimal |
| D. | BCD codes are easily converted to straight binary codes. |
| Answer» D. BCD codes are easily converted to straight binary codes. | |
| 125. |
Convert each of the following signed binary numbers (two's-complement) to a signed decimal number.00000101        11111100        11111000 |
| A. | –5    +4    +8 |
| B. | +5    –4    –8 |
| C. | –5    +252    +248 |
| D. | +5    –252    –248 |
| Answer» C. ‚Äì5¬†¬†¬†¬†+252¬†¬†¬†¬†+248 | |
| 126. |
The solution to the binary problem 00110110 – 00011111 is 00011000. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 127. |
The BCD addition of 910 and 710 will give initial code groups of 1001 + 0111. Addition of these groups generates a carry to the next higher position. The correct solution to this problem would be to: |
| A. | ignore the lowest order code group because 0000 is a valid code group and prefix the carry with three zeros |
| B. | add 0110 to both code groups to validate the carry from the lowest order code group |
| C. | disregard the carry and add 0110 to the lowest order code group |
| D. | add 0110 to the lowest order code group because a carry was generated and then prefix the carry with three zeros |
| Answer» E. | |
| 128. |
How many basic binary subtraction operations are possible? |
| A. | 4 |
| B. | 3 |
| C. | 2 |
| D. | 1 |
| Answer» B. 3 | |
| 129. |
What are the two types of basic adder circuits? |
| A. | sum and carry |
| B. | half-adder and full-adder |
| C. | asynchronous and synchronous |
| D. | one- and two's-complement |
| Answer» C. asynchronous and synchronous | |
| 130. |
The 2's-complement system is to be used to add the signed binary numbers 11110010 and 11110011. Determine, in decimal, the sign and value of each number and their sum. |
| A. | –113 and –114, –227 |
| B. | –14 and –13, –27 |
| C. | –11 and –16, –27 |
| D. | –27 and –13, –40 |
| Answer» C. ‚Äì11 and ‚Äì16, ‚Äì27 | |
| 131. |
An 8-bit register may provide storage for two's-complement codes within which decimal range? |
| A. | +128 to –128 |
| B. | –128 to +127 |
| C. | +128 to –127 |
| D. | +127 to –127 |
| Answer» C. +128 to ‚Äì127 | |
| 132. |
Subtract the following binary numbers. 0101 1000   1010 0011   1101 1110 –0010 0011   –0011 1000   –0101 0111 |
| A. | 0011  0100    0110  1010    1000  0110 |
| B. | 0011  0101    0110  1011    1000  0111 |
| C. | 0011  0101    0110  1010    1000  0111 |
| D. | 0011  0101    0110  1010    1000  0110 |
| Answer» C. 0011¬†¬†0101¬†¬†¬†¬†0110¬†¬†1010¬†¬†¬†¬†1000¬†¬†0111 | |
| 133. |
A binary sum is made up of only 1s and 0s. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 134. |
Perform the following hex subtraction: ACE16 – 99916 = |
| A. | 23516 |
| B. | 13516 |
| C. | 3516 |
| D. | 33516 |
| Answer» C. 3516 | |
| 135. |
An input to the mode pin of an arithmetic/logic unit (ALU) determines if the function will be: |
| A. | one's-complemented |
| B. | arithmetic or logic |
| C. | positive or negative |
| D. | with or without carry |
| Answer» C. positive or negative | |
| 136. |
The two's-complement system is to be used to add the signed numbers 11110010 and 11110011. Determine, in decimal, the sign and value of each number and their sum. |
| A. | –14 and –13, –27 |
| B. | –113 and –114, 227 |
| C. | –27 and –13, 40 |
| D. | –11 and –16, –27 |
| Answer» B. ‚Äì113 and ‚Äì114, 227 | |
| 137. |
The binary adder circuit is designed to add ________ binary numbers at the same time. |
| A. | 2 |
| B. | 4 |
| C. | 6 |
| D. | 8 |
| Answer» B. 4 | |
| 138. |
When the 2's-complement system is used, the number to be subtracted is changed to its 2's complement and then added to the minuend. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 139. |
Solve this binary problem: 01011000 √∑ 00001011 = ________. |
| A. | 1010 |
| B. | 110 |
| C. | 1000 |
| D. | 1110 |
| Answer» D. 1110 | |
| 140. |
Solve this binary problem: 01000110 √∑ 00001010 = |
| A. | 111 |
| B. | 10011 |
| C. | 1001 |
| D. | 11 |
| Answer» B. 10011 | |
| 141. |
Convert each of the signed decimal numbers to an 8-bit signed binary number (two's-complement).+7        –3        –12 |
| A. | 0000  0111    1111  1101    1111  0100 |
| B. | 1000  0111    0111  1101    0111  0100 |
| C. | 0000  0111    0000  0011    0000  1100 |
| D. | 0000  0111    1000  0011    1000  1100 |
| Answer» B. 1000¬†¬†0111¬†¬†¬†¬†0111¬†¬†1101¬†¬†¬†¬†0111¬†¬†0100 | |
| 142. |
Solve this binary problem: |
| A. | 1001 |
| B. | 110 |
| C. | 111 |
| D. | 101 |
| Answer» D. 101 | |
| 143. |
When performing subtraction by addition in the 2's-complement system: |
| A. | the minuend and the subtrahend are both changed to the 2's-complement. |
| B. | the minuend is changed to 2's-complement and the subtrahend is left in its original form. |
| C. | the minuend is left in its original form and the subtrahend is changed to its 2's-complement. |
| D. | the minuend and subtrahend are both left in their original form. |
| Answer» D. the minuend and subtrahend are both left in their original form. | |
| 144. |
Binary subtraction of a decimal 15 from 43 will utilize which two's complement? |
| A. | 101011 |
| B. | 110000 |
| C. | 11100 |
| D. | 110001 |
| Answer» E. | |
| 145. |
Add the following binary numbers. 0010 0110   0011 1011   0011 1100 +0101 0101   +0001 1110   +0001 1111 |
| A. | 0111 1011    0100  0001    0101  1011 |
| B. | 0111 1011    0101  1001    0101  1011 |
| C. | 0111 0111    0101  1001    0101  1011 |
| D. | 0111 0111    0100  0001    0101  1011 |
| Answer» C. 0111 0111¬†¬†¬†¬†0101¬†¬†1001¬†¬†¬†¬†0101¬†¬†1011 | |
| 146. |
What is wrong, if anything, with the circuit in the given figure based on the logic analyzer display accompanying the circuit? |
| A. | The CO terminal is shorted to ground. |
| B. | The S1 output is shorted to Vcc. |
| C. | The P1 input is not being added into the total. |
| D. | Nothing is wrong; the circuit is functioning correctly. |
| Answer» D. Nothing is wrong; the circuit is functioning correctly. | |
| 147. |
BCD arithmetic is performed using base 10 numbers. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 148. |
Find the 2's complement of –1101102. |
| A. | 1101002 |
| B. | 1010102 |
| C. | 10012 |
| D. | 10102 |
| Answer» E. | |
| 149. |
Add the following hex numbers: 011016 + 1001016 |
| A. | 1012016 |
| B. | 1002016 |
| C. | 1112016 |
| D. | 12016 |
| Answer» B. 1002016 | |
| 150. |
How many BCD adders would be required to add the numbers 97310 + 3910? |
| A. | 3 |
| B. | 4 |
| C. | 5 |
| D. | 6 |
| Answer» B. 4 | |