194 + Mcqs in Digital Arithmetic Operations And Circuits Page 2 McqOptions

51.	The binary subtraction 0 – 1 = isdifference = 1borrow = 0
A.	True
B.	False
Answer» C.

Discussion

52.	111010002 is the 2's-complement representation of –24.
A.	True
B.	False
Answer» C.

Discussion

53.	If [A] = 1011 1010, [B] = 0011 0110, and [C] = [A] [B], what is [C 4..2] in decimal?
A.	1
B.	2
C.	3
D.	4
Answer» E.

Discussion

54.	Find the 2's complement of –1101102.
A.	1101002
B.	1010102
C.	0010012
D.	0010102
Answer» E.

Discussion

55.	The solution to the binary problem 1011 √ó 0110 is 01100110.
A.	1
B.
Answer» C.

Discussion

56.	The look-ahead-carry adder is slower than the ripple-carry adder because it requires additional logic circuits.
A.	1
B.
Answer» C.

Discussion

57.	The two's complement of 00001111 is ________.
A.	11111111
B.	11110000
C.	11110001
D.	11110111
Answer» D. 11110111

Discussion

58.	In BCD addition, the value ________ is added to any invalid code group.
A.	10101
B.	0U812
C.	100110
D.	110
Answer» E.

Discussion

59.	Packages are used to contain ________ and other information that must be available to all entities in the design file.
A.	types
B.	vectors
C.	components
D.	variables
Answer» D. variables

Discussion

60.	The representation of ‚Äì110 in eight-bit two's-complement notation is 11110111.
A.	1
B.
Answer» C.

Discussion

61.	Full adders can add two numbers and need not have a carry input or a carry output.
A.	1
B.
Answer» C.

Discussion

62.	To make an eight-bit adder from two four-bit adders you must connect ________.
A.	the high-order carry-in to ground
B.	the low-order carry-out to the high-order carry-in
C.	the high-order carry-out to ground
D.	the low-order sum to the high-order data input
Answer» C. the high-order carry-out to ground

Discussion

63.	Digital computers use an easier method to subtract binary numbers, called one's complement.
A.	1
B.
Answer» C.

Discussion

64.	Binary numbers can be added together in a basic parallel-adder circuit when ________.
A.	negative numbers are in 2's-complement form
B.	negative numbers are in 1's-complement form
C.	all carry pins are grounded
D.	all negative numbers are noted
Answer» B. negative numbers are in 1's-complement form

Discussion

65.	The 74LS382 ALU is a 24-pin arithmetic/logic unit.
A.	1
B.
Answer» C.

Discussion

66.	It is not necessary to have the same number of bits when adding or subtracting signed binary numbers in the 2's-complement system.
A.	1
B.
Answer» C.

Discussion

67.	If no bits are designated inside square braces, [ ], it means the variable is the null set.
A.	1
B.
Answer» C.

Discussion

68.	In AHDL macrofunctions, the first thing that should go into any source file is ________ your code.
A.	a field of comments that documents
B.	a library of
C.	a function name of
D.	the universal global definition of
Answer» B. a library of

Discussion

69.	Constants must be included in a package.
A.	1
B.
Answer» B.

Discussion

70.	A four-bit adder can perform ________.
A.	addition
B.	subtraction
C.	logical AND
D.	All of the above
Answer» B. subtraction

Discussion

71.	When subtracting 6 from 9 using 2's-complement methods, the ________ is 2's complemented before the addition.
A.	six
B.	multiplier
C.	nine
D.	two
Answer» B. multiplier

Discussion

72.	The inputs of a full adder are labeled A1, B1, and Cin.
A.	1
B.
Answer» B.

Discussion

73.	The contents of the A register after is ________.
A.	0
B.	1
C.	1001
D.	1010
Answer» E.

Discussion

74.	A sign bit of "1" in the difference of a 2's-complement subtraction problem indicates the magnitude is negative and in true binary form.
A.	1
B.
Answer» C.

Discussion

75.	The VHDL compiler requires libraries to be specified at the beginning of the code if components from those libraries are being used.
A.	1
B.
Answer» B.

Discussion

76.	A 74HC283 can be used to implement a(n) ________ adder.
A.	4-bit BCD
B.	8-bit BCD
C.	4-bit full
D.	8-bit full
Answer» D. 8-bit full

Discussion

77.	The solution to the binary problem 1011 ‚Äì 0111 is 1000.
A.	1
B.
Answer» C.

Discussion

78.	ALU circuits cannot be cascaded to perform functions on more than four bits.
A.	1
B.
Answer» C.

Discussion

79.	Solve this binary problem: 1001 √ó 1100 = ________.
A.	1110001
B.	1111000
C.	1101100
D.	1101110
Answer» D. 1101110

Discussion

80.	If [A] = 10 and [B] = 01, then [A] + [B] = [ ].
A.	1
B.
Answer» C.

Discussion

81.	Solve this BCD problem: 0101 + 0110 = ________.
A.	00010111BCD
B.	00001001BCD
C.	00010001BCD
D.	00010011BCD
Answer» D. 00010011BCD

Discussion

82.	The solution to the BCD problem 0101 + 0100 is 00001001BCD.
A.	1
B.
Answer» B.

Discussion

83.	The carry-out of a binary adder is identified using the summation symbol, sigma.
A.	1
B.
Answer» C.

Discussion

84.	A 74HC283 can be used to implement a 4-bit full adder.
A.	1
B.
Answer» B.

Discussion

85.	FC48 ‚Äì AB91 = ________.
A.	5B77
B.	5267
C.	50B7
D.	5077
Answer» D. 5077

Discussion

86.	The circuit shown is a(n) ________.
A.	multiplexer
B.	adder
C.	comparator
D.	converter
Answer» C. comparator

Discussion

87.	A macrofunction is a self-contained description of a logic circuit with all of its inputs, outputs, and operational characteristics defined.
A.	1
B.
Answer» B.

Discussion

88.	Binary division and decimal division use the same procedure.
A.	1
B.
Answer» B.

Discussion

89.	The binary subtraction 0 ‚Äì 1 = isdifference = 1borrow = 0
A.	1
B.
Answer» C.

Discussion

90.	Overflow indicators in ALU circuits indicate when add or subtract operations produce results that are too large to fit into four bits.
A.	1
B.
Answer» B.

Discussion

91.	The concurrent section of the hardware description is where the ________ are interconnected.
A.	functions
B.	components
C.	circuits
D.	macrofunctions
Answer» C. circuits

Discussion

92.	Full adder results are typically stored in registers.
A.	1
B.
Answer» B.

Discussion

93.	‚Äì910 represented in eight-bit two's-complement notation is ________.
A.	11110111
B.	11111001
C.	11110110
D.	1111101
Answer» B. 11111001

Discussion

94.	Negation is performed by simply performing the ________ operation.
A.	1's-complement
B.	sign
C.	surrogate
D.	2's-complement
Answer» E.

Discussion

95.	If [A] = 10 and [B] = 01, then [A] [b] = ________.
A.	[00]
B.	0
C.	11
D.	[11]
Answer» D. [11]

Discussion

96.	10011100 in two's-complement notation has a decimal value of ‚Äì100.
A.	1
B.
Answer» C.

Discussion

97.	Inside a computer all arithmetic operations take place in the ________.
A.	accumulator register
B.	ALU
C.	CPU
D.	B register
Answer» C. CPU

Discussion

98.	Larger number capacities may be obtained from 2-bit adders by paralleling them.
A.	1
B.
Answer» B.

Discussion

99.	When performing binary addition using the 2's-complement method, an ________ can occur if ________ are of the same ________; the error is indicated by a(n) ________.
A.	error, both numbers, magnitude, negative sign
B.	overflow, both numbers, sign, incorrect sign bit
C.	overflow, signs, magnitude, incorrect sum
D.	error, the signs, polarity, incorrect polarity
Answer» C. overflow, signs, magnitude, incorrect sum

Discussion

100.	This logic gate is used to produce an arithmetic sum XOR.
A.	1
B.
Answer» B.

Discussion

Explore topic-wise MCQs in Digital Electronics.

The binary subtraction 0 – 1 = isdifference = 1borrow = 0

111010002 is the 2's-complement representation of –24.

If [A] = 1011 1010, [B] = 0011 0110, and [C] = [A]  [B], what is [C 4..2] in decimal?

Find the 2's complement of –1101102.

The solution to the binary problem 1011 √ó 0110 is 01100110.

The look-ahead-carry adder is slower than the ripple-carry adder because it requires additional logic circuits.

The two's complement of 00001111 is ________.

In BCD addition, the value ________ is added to any invalid code group.

Packages are used to contain ________ and other information that must be available to all entities in the design file.

The representation of ‚Äì110 in eight-bit two's-complement notation is 11110111.

Full adders can add two numbers and need not have a carry input or a carry output.

To make an eight-bit adder from two four-bit adders you must connect ________.

Digital computers use an easier method to subtract binary numbers, called one's complement.

Binary numbers can be added together in a basic parallel-adder circuit when ________.

The 74LS382 ALU is a 24-pin arithmetic/logic unit.

It is not necessary to have the same number of bits when adding or subtracting signed binary numbers in the 2's-complement system.

If no bits are designated inside square braces, [ ], it means the variable is the null set.

In AHDL macrofunctions, the first thing that should go into any source file is ________ your code.

Constants must be included in a package.

A four-bit adder can perform ________.

When subtracting 6 from 9 using 2's-complement methods, the ________ is 2's complemented before the addition.

The inputs of a full adder are labeled A1, B1, and Cin.

The contents of the A register after is ________.

A sign bit of "1" in the difference of a 2's-complement subtraction problem indicates the magnitude is negative and in true binary form.

The VHDL compiler requires libraries to be specified at the beginning of the code if components from those libraries are being used.

A 74HC283 can be used to implement a(n) ________ adder.

The solution to the binary problem 1011 ‚Äì 0111 is 1000.

ALU circuits cannot be cascaded to perform functions on more than four bits.

Solve this binary problem: 1001 √ó 1100 = ________.

If [A] = 10 and [B] = 01, then [A] + [B] = [ ].

Solve this BCD problem: 0101 + 0110 = ________.

The solution to the BCD problem 0101 + 0100 is 00001001BCD.

The carry-out of a binary adder is identified using the summation symbol, sigma.

A 74HC283 can be used to implement a 4-bit full adder.

FC48 ‚Äì AB91 = ________.

The circuit shown is a(n) ________.

A macrofunction is a self-contained description of a logic circuit with all of its inputs, outputs, and operational characteristics defined.

Binary division and decimal division use the same procedure.

The binary subtraction 0 ‚Äì 1 = isdifference = 1borrow = 0

Overflow indicators in ALU circuits indicate when add or subtract operations produce results that are too large to fit into four bits.

The concurrent section of the hardware description is where the ________ are interconnected.

Full adder results are typically stored in registers.

‚Äì910 represented in eight-bit two's-complement notation is ________.

Negation is performed by simply performing the ________ operation.

If [A] = 10 and [B] = 01, then [A] [b] = ________.

10011100 in two's-complement notation has a decimal value of ‚Äì100.

Inside a computer all arithmetic operations take place in the ________.

Larger number capacities may be obtained from 2-bit adders by paralleling them.

When performing binary addition using the 2's-complement method, an ________ can occur if ________ are of the same ________; the error is indicated by a(n) ________.

This logic gate is used to produce an arithmetic sum XOR.

If [A] = 1011 1010, [B] = 0011 0110, and [C] = [A] [B], what is [C 4..2] in decimal?

When performing binary addition using the 2's-complement method, an can occur if are of the same ; the error is indicated by a(n) .