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This section includes 204 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.
| 151. |
A CD player is an example of a device that has random access capability. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 152. |
The memory operation that presents data on the memory outputs after entering a new address is called ________. |
| A. | a read cycle |
| B. | a write cycle |
| C. | a refresh cycle |
| D. | a chip select |
| Answer» B. a write cycle | |
| 153. |
EEPROM stands for ________. |
| A. | encapsulated electrical programmable read-only memory |
| B. | elementary electrical programmable read-only memory |
| C. | electrically erasable programmable read-only memory |
| D. | elementary erasable programmable read-only memory |
| Answer» D. elementary erasable programmable read-only memory | |
| 154. |
What are the typical values of tOE? |
| A. | 10 to 20 ns for bipolar |
| B. | 25 to 100 ns for NMOS |
| C. | 12 to 50 ns for CMOS |
| D. | All of the above |
| Answer» E. | |
| 155. |
The location of a unit of data in a memory array is called its ________. |
| A. | storage |
| B. | RAM |
| C. | address |
| D. | data |
| Answer» D. data | |
| 156. |
A major disadvantage of the mask ROM is that it: |
| A. | is time consuming to change the stored data when system requirements change |
| B. | is very expensive to change the stored data when system requirements change |
| C. | cannot be reprogrammed if stored data needs to be changed |
| D. | has an extremely short life expectancy and requires frequent replacement |
| Answer» D. has an extremely short life expectancy and requires frequent replacement | |
| 157. |
How many 8 k √ó 1 RAMs are required to achieve a memory with a word capacity of 8 k and a word length of eight bits? |
| A. | Eight |
| B. | Four |
| C. | Two |
| D. | One |
| Answer» B. Four | |
| 158. |
Dynamic memory cells store a data bit in a ________. |
| A. | diode |
| B. | resistor |
| C. | capacitor |
| D. | flip-flop |
| Answer» D. flip-flop | |
| 159. |
Refer the given figure. The outputs (Q0–Q3) of the memory are always LOW. The address lines (A0–A7) are checked with a logic probe and all are indicating pulse activity, except for A3, which shows a constant HIGH, and A7, which shows a constant LOW; the select lines, are checked and shows pulse activity, while indicates a constant HIGH. What is wrong, and how can the memory be tested to determine whether it is defective or if the external circuitry is defective? |
| A. | One of the inputs to the active-LOW select AND gate may be stuck high for some reason; take both select lines LOW and check for pulse activity on the outputs, Q0–Q3. If the outputs now respond, the problem is most likely in the program or circuitry driving the select lines. |
| B. | The problem appears to be in the two address lines that never change levels; the problem is probably in the program driving the memory address bus. |
| C. | The output buffers are probably defective since they are all tied together; the common input line is most likely stuck LOW. Change the output buffer IC. |
| D. | Since no data appears to be getting through to the output buffers, the problem may be in the X decoder; change the X decoder IC. |
| Answer» B. The problem appears to be in the two address lines that never change levels; the problem is probably in the program driving the memory address bus. | |
| 160. |
The main advantage of semiconductor RAM is its ability to: |
| A. | retain stored data when power is interrupted or turned off |
| B. | be written to and read from rapidly |
| C. | be randomly accessed |
| D. | be sequentially accessed |
| Answer» C. be randomly accessed | |
| 161. |
How many storage locations are available when a memory device has 12 address lines? |
| A. | 144 |
| B. | 512 |
| C. | 2048 |
| D. | 4096 |
| Answer» E. | |
| 162. |
For the given circuit, which of the following is correct? |
| A. | The number 5 is being written to the memory at address location 203. |
| B. | The chip has not been enabled, since the EN terminal is 0; therefore, nothing will be written to the chip and the output is tri-stated. |
| C. | Decimal 10 is being written into memory location 211. |
| D. | The read/write line is LOW; therefore, decimal 5 is being stored at memory location 211. |
| Answer» D. The read/write line is LOW; therefore, decimal 5 is being stored at memory location 211. | |
| 163. |
Data is written to and read from the disk via a magnetic ________ head mechanism in the floppy drive. |
| A. | cylinder |
| B. | read/write |
| C. | recordable |
| D. | cluster |
| Answer» C. recordable | |
| 164. |
The reason the data outputs of most ROM ICs are tristate outputs is to: |
| A. | allow for three separate data input lines. |
| B. | allow the bidirectional flow of data between the bus lines and the ROM registers. |
| C. | permit the connection of many ROM chips to a common data bus. |
| D. | isolate the registers from the data bus during read operations. |
| Answer» D. isolate the registers from the data bus during read operations. | |
| 165. |
In general, the ________ have the smallest bit size and the ________ have the largest. |
| A. | EEPROMs, Flash |
| B. | SRAM, mask ROM |
| C. | mask ROM, SRAM |
| D. | DRAM, PROM |
| Answer» B. SRAM, mask ROM | |
| 166. |
A typical RAM will read (place stored data on its outputs) whenever the Chip Select line is active and the Write Enable line is inactive. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 167. |
How many 1K √ó 4 RAM chips would be required to build a 1K √ó 8 memory system? |
| A. | 2 |
| B. | 4 |
| C. | 8 |
| D. | 16 |
| Answer» B. 4 | |
| 168. |
Static RAMs (SRAMs) use internal capacitors as basic storage elements. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 169. |
Which of the following best describes static memory devices? |
| A. | memory devices that are magnetic in nature and do not require constant refreshing |
| B. | memory devices that are magnetic in nature and require constant refreshing |
| C. | semiconductor memory devices in which stored data will not be retained with the power applied unless constantly refreshed |
| D. | semiconductor memory devices in which stored data is retained as long as power is applied |
| Answer» E. | |
| 170. |
Why are ROMs called nonvolatile memory? |
| A. | They lose memory when power is removed. |
| B. | They do not lose memory when power is removed. |
| Answer» C. | |
| 171. |
Why do most dynamic RAMs use a multiplexed address bus? |
| A. | It is the only way to do it. |
| B. | to make it faster |
| C. | to keep the number of pins on the chip to a minimum |
| Answer» D. | |
| 172. |
Which is not a removable drive? |
| A. | Zip |
| B. | Jaz |
| C. | Hard |
| D. | SuperDisk |
| Answer» D. SuperDisk | |
| 173. |
ROM is a type of memory in which data are stored permanently or semipermanently. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 174. |
All rows in a 2118 dynamic RAM need to be refreshed ________. |
| A. | every second |
| B. | every millisecond |
| C. | every 50 milliseconds |
| D. | every 2 milliseconds |
| Answer» E. | |
| 175. |
What is the computer main memory? |
| A. | Hard drive and RAM |
| B. | CD-ROM and hard drive |
| C. | RAM and ROM |
| D. | CMOS and hard drive |
| Answer» D. CMOS and hard drive | |
| 176. |
A 64-bit word consists of ________. |
| A. | 4 bytes |
| B. | 8 bytes |
| C. | 10 bytes |
| D. | 12 bytes |
| Answer» C. 10 bytes | |
| 177. |
How can UV erasable PROMs be recognized? |
| A. | There is a small window on the chip. |
| B. | They will have a small violet dot next to the #1 pin. |
| C. | Their part number always starts with a "U", such as in U12. |
| D. | They are not readily identifiable, since they must always be kept under a small cover. |
| Answer» B. They will have a small violet dot next to the #1 pin. | |
| 178. |
On a CD-ROM, ________ are recessed areas representing a 0. |
| A. | mounds |
| B. | lands |
| C. | holes |
| D. | pits |
| Answer» E. | |
| 179. |
The smallest unit of binary data is the ________. |
| A. | bit |
| B. | nibble |
| C. | byte |
| D. | word |
| Answer» B. nibble | |
| 180. |
Select the statement that best describes Read-Only Memory (ROM). |
| A. | nonvolatile, used to store information that changes during system operation |
| B. | nonvolatile, used to store information that does not change during system operation |
| C. | volatile, used to store information that changes during system operation |
| D. | volatile, used to store information that does not change during system operation |
| Answer» C. volatile, used to store information that changes during system operation | |
| 181. |
Read-only memory is memory ________. |
| A. | that has unlimited storage capacity |
| B. | whose data can never be altered by the user |
| C. | that must be refreshed periodically or it will lose storage |
| D. | that maintains storage as long as power is applied |
| Answer» C. that must be refreshed periodically or it will lose storage | |
| 182. |
RAM stands for Readily Accessible Memory. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 183. |
CCD stands for ________. |
| A. | capacitor charging device |
| B. | capacitor-capacitor drain |
| C. | charged-capacitor device |
| D. | charge-coupled device |
| Answer» E. | |
| 184. |
Refer to the given figures (a) and (b). A logic analyzer is used to check the circuit in figure (a) and displays the waveforms shown in figure (b). The actual analyzer display shows all four data outputs, Q0-Q3. The analyzer's cursor is placed at position X and all four of the data output lines show a LOW level output. What is wrong, if anything, with the circuit? |
| A. | Nothing is wrong, according to the display. The outputs are in the open state and should show zero output voltage. |
| B. | The circuit is in the READ mode and the outputs, Q0-Q3, should reflect the contents of the memory at that address. The chip is defective; replace the chip. |
| C. | The circuit is in the mode and should be writing the contents of the selected address to Q0–Q3. |
| D. | The Q0–Q3 lines can be either LOW or HIGH, since the chip is in the tristate mode in which case their level is unpredictable. |
| Answer» B. The circuit is in the READ mode and the outputs, Q0-Q3, should reflect the contents of the memory at that address. The chip is defective; replace the chip. | |
| 185. |
How many address bits are required for a 4096-bit memory organized as a 512 √ó 8 memory? |
| A. | 2 |
| B. | 4 |
| C. | 8 |
| D. | 9 |
| Answer» E. | |
| 186. |
The refresh period for capacitors used in DRAMs is ________. |
| A. | 2 ms |
| B. | 2 s |
| C. | 64 ms |
| D. | 64 s |
| Answer» B. 2 s | |
| 187. |
In a DRAM, what is the state of R/W during a read operation? |
| A. | Low |
| B. | High |
| C. | Hi-Z |
| D. | None of the above |
| Answer» C. Hi-Z | |
| 188. |
The storage element for a static RAM is the ________. |
| A. | diode |
| B. | resistor |
| C. | capacitor |
| D. | flip-flop |
| Answer» E. | |
| 189. |
The device shown in the given figure is checked with a logic probe and the output is HIGH. |
| A. | The device is working properly. |
| B. | For the input conditions shown the output should be LOW; the input is shorted to ground. |
| C. | For the input conditions shown the output should be neither HIGH nor LOW; the device is shorted to . |
| D. | The device is probably alright; the problem is most likely caused by the stage connected to the output of the device. |
| Answer» D. The device is probably alright; the problem is most likely caused by the stage connected to the output of the device. | |
| 190. |
The periodic recharging of DRAM memory cells is called ________. |
| A. | multiplexing |
| B. | bootstrapping |
| C. | refreshing |
| D. | flashing |
| Answer» D. flashing | |
| 191. |
On a CD-ROM, ________ are raised areas representing a 1. |
| A. | mounds |
| B. | lands |
| C. | holes |
| D. | pits |
| Answer» C. holes | |
| 192. |
Which of the following is one of the basic characteristics of DRAMs? |
| A. | DRAMs must have a constantly changing input. |
| B. | DRAMs must be periodically refreshed in order to be able to retain data. |
| C. | DRAMs have a broader "dynamic" storage range than other types of memories. |
| D. | DRAMs are simpler devices than other types of memories. |
| Answer» C. DRAMs have a broader "dynamic" storage range than other types of memories. | |
| 193. |
How many 2K √ó 8 ROM chips would be required to build a 16K √ó 8 memory system? |
| A. | 2 |
| B. | 4 |
| C. | 8 |
| D. | 16 |
| Answer» D. 16 | |
| 194. |
Static memory will maintain storage even if power is removed. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 195. |
A 64-Mbyte SIMM is installed into a system, but when a memory test is executed, the SIMM is detected as a 32-Mbyte device. What is a possible cause? |
| A. | The memory module was not installed properly. |
| B. | The voltage on the memory module is incorrect. |
| C. | The most significant address line is stuck high or low. |
| D. | The address decoder on the SIMM is faulty. |
| Answer» E. | |
| 196. |
The condition occurring when two or more devices try to write data to a bus simultaneously is called ________. |
| A. | address decoding |
| B. | bus contention |
| C. | bus collisions |
| D. | address multiplexing |
| Answer» C. bus collisions | |
| 197. |
Assume a ROM to be tested is compared with a known good ROM. If the checksums differ, the ROM is ________. |
| A. | very likely to be good |
| B. | definitely good |
| C. | very likely to be bad |
| D. | definitely bad |
| Answer» E. | |
| 198. |
What is the meaning of RAM, and what is its primary role? |
| A. | Readily Available Memory; it is the first level of memory used by the computer in all of its operations. |
| B. | Random Access Memory; it is memory that can be reached by any sub- system within a computer, and at any time. |
| C. | Random Access Memory; it is the memory used for short-term temporary data storage within the computer. |
| D. | Resettable Automatic Memory; it is memory that can be used and then automatically reset, or cleared, after being read from or written to. |
| Answer» D. Resettable Automatic Memory; it is memory that can be used and then automatically reset, or cleared, after being read from or written to. | |
| 199. |
The check sum method of testing a ROM: |
| A. | indicates if the data in more than one memory location is incorrect. |
| B. | provides a means for locating and correcting data errors in specific memory locations. |
| C. | allows data errors to be pinpointed to a specific memory location. |
| D. | simply indicates that the contents of the ROM are incorrect. |
| Answer» E. | |
| 200. |
Which is not a hard disk performance parameter? |
| A. | Seek time |
| B. | Break time |
| C. | Latency period |
| D. | Access time |
| Answer» C. Latency period | |