MCQOPTIONS
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MCQOPTIONS
This section includes 135 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
The input of an analog-to-digital converter is ________. |
| A. | a voltage level |
| B. | a clock pulse |
| C. | a binary number |
| D. | any of the above |
| Answer» B. a clock pulse | |
| 52. |
Referring to the given figure, what appears to be wrong, if anything, with the D/A converter and what should be done to correct the problem? |
| A. | There is nothing wrong with the converter. |
| B. | There is an offset error; if no provision is made for adjusting the offset, the op-amp may need to be changed. |
| C. | There is a nonlinearity error; the op-amp must be changed. |
| D. | The power supply voltage appears to be too high; adjust the power supply to the correct value. |
| Answer» C. There is a nonlinearity error; the op-amp must be changed. | |
| 53. |
An analog quantity varies from 0–7 V and is input to a 6-bit A/D converter. What analog value is represented by each step on the digital output? |
| A. | 0.111 V |
| B. | 1.17 V |
| C. | 0.109 V |
| D. | 0.857 V |
| Answer» B. 1.17 V | |
| 54. |
________ are the most linear of all the temperature transducers. |
| A. | Thermistors |
| B. | Thermocouples |
| C. | IC temperature sensors |
| D. | Resistance temperature detectors |
| Answer» D. Resistance temperature detectors | |
| 55. |
The characteristic that a change of one binary step on the input of a DAC should cause exactly one step change on the output is called ________. |
| A. | resolution |
| B. | linearity |
| C. | monotonicity |
| D. | accuracy |
| Answer» D. accuracy | |
| 56. |
What is the main disadvantage of the counter-ramp A/D converter? |
| A. | It requires a counter. |
| B. | The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage. |
| C. | It requires a precision clock in order for the conversion to be reliable. |
| D. | The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage. It requires a precision clock in order for the conversion to be reliable. |
| Answer» C. It requires a precision clock in order for the conversion to be reliable. | |
| 57. |
What is the maximum output voltage for the circuit shown below? |
| A. | –20 volts |
| B. | –5 volts |
| C. | –9.375 volts |
| D. | –2.1775 volts |
| Answer» D. ‚Äì2.1775 volts | |
| 58. |
Electrical quantities can be interpreted without conditioning by a digital computer. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 59. |
What is the resolution, in percent, of a 12-bit DAC? |
| A. | 8.33 |
| B. | 0.049 |
| C. | 0.000488 |
| D. | 0.083 |
| Answer» C. 0.000488 | |
| 60. |
What is the maximum conversion time for an 8-bit successive-approximation ADC with a clock frequency of 20 kHz? |
| A. | 12.8 ms |
| B. | 6.4 ms |
| C. | 0.05 ms |
| D. | 0.4 ms |
| Answer» E. | |
| 61. |
A sample-and-hold circuit is used in D/A conversion. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 62. |
One disadvantage of the tracking A/D converter is: |
| A. | that it requires two counters—one for up and one for down. |
| B. | that the binary output will oscillate between two binary states when the analog input is constant. |
| C. | the need for an accurate clock reference for the counter. |
| D. | the need for a latch and its associated control circuit. |
| Answer» C. the need for an accurate clock reference for the counter. | |
| 63. |
A simultaneous A/D converter is also known as a(n) ________ A/D converter. |
| A. | flash |
| B. | synchronous |
| C. | comparator |
| D. | asynchronous |
| Answer» B. synchronous | |
| 64. |
A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and a maximum input of 10 V, and has 6 V applied to the input. The conversion time will be ________. |
| A. | 10 microseconds |
| B. | 160 microseconds |
| C. | 90 microseconds |
| D. | 6250 seconds |
| Answer» D. 6250 seconds | |
| 65. |
The stability of the ADC process can be improved by using a(n) ________ to hold the analog voltage constant while the A/D conversion is taking place. |
| A. | sample-and-hold circuit |
| B. | op-amp comparator |
| C. | NPN amp |
| D. | current loop |
| Answer» B. op-amp comparator | |
| 66. |
What is the speed of the up/down digital-ramp ADC (tracking ADC)? |
| A. | 20 s |
| B. | 10 s |
| C. | 1 s |
| D. | Relatively slow |
| Answer» E. | |
| 67. |
Two principal advantages of the dual-slope ADC are its: |
| A. | high speed and low cost. |
| B. | high sensitivity to noise and low cost. |
| C. | low sensitivity to noise and high speed. |
| D. | low sensitivity to noise and low cost. |
| Answer» E. | |
| 68. |
The output voltage or current of a digital-to-analog converter is truly an analog signal. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 69. |
What is the output voltage of the given circuit if the inputs are as follows: 20 = 1, 21 = 1, 22 = 0, 23 = 0? |
| A. | –3.115 volts |
| B. | –2.8025 volts |
| C. | –1.875 volts |
| D. | –1.24 volts |
| Answer» D. ‚Äì1.24 volts | |
| 70. |
The amount of deviation of the measured step size from the ideal step size is a measure of linearity. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 71. |
Which of the statements below best describes the basic operation of a dual-slope A/D converter? |
| A. | The input voltage is used to set the frequency of a voltage-controlled oscillator (VCO). The VCO quits changing frequency when the input voltage stabilizes. The frequency of the VCO, which is proportional to the analog input voltage, is measured and is displayed on the digital display as a voltage reading. |
| B. | A ramp generator is used to enable a counter through a comparator. When the ramp voltage equals the input voltage, the counter is latched and then reset. The counter reading is proportional to the input voltage since the ramp is changing at a constant V/second rate. |
| C. | A ramp voltage and analog input voltage are applied to a comparator. As the input voltage causes the integrating capacitor to charge, it will at some point equal the ramp voltage. The ramp voltage is measured and displayed on the digital panel meter. |
| D. | Two ramps are generated: one by the input voltage and the other by a reference voltage. The input voltage ramp charges the integrating capacitor, while the reference voltage discharges the capacitor and enables the counter until the capacitor is discharged, at which time the counter value is loaded into the output latches. |
| Answer» E. | |
| 72. |
What is the resolution of a D/A converter? |
| A. | It is the reciprocal of the number of discrete steps in the D/A output. |
| B. | It is the comparison between the actual output of the converter and its expected output. |
| C. | It is the deviation between the ideal straight-line output and the actual output of the converter. |
| D. | It is the converter's ability to resolve between forward and reverse steps when sequenced over its entire range of inputs. |
| Answer» B. It is the comparison between the actual output of the converter and its expected output. | |
| 73. |
What is the maximum conversion time for a counter-ramp ADC with 8-bit resolution and a clock frequency of 20 kHz? |
| A. | 12.8 ms |
| B. | 6.4 ms |
| C. | 0.05 ms |
| D. | 0.4 ms |
| Answer» B. 6.4 ms | |
| 74. |
If the range of output voltage of a 6-bit DAC is 0 to 15 volts, what is the step voltage of the output? |
| A. | 0.117 volt/step |
| B. | 0.234 volt/step |
| C. | 2.13 volts/step |
| D. | 4.26 volts/step |
| Answer» C. 2.13 volts/step | |
| 75. |
One form of a sigma/delta modulator circuit is designed to convert a continuous analog signal into a modulated bit stream (A/D). |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 76. |
Which of the following characterizes an analog quantity? |
| A. | Discrete levels represent changes in a quantity. |
| B. | Its values follow a logarithmic curve. |
| C. | It can be described with a finite number of steps. |
| D. | It has a continuous set of values over a given range. |
| Answer» E. | |
| 77. |
One way to determine the resolution of a DAC is to calculate the ratio of one step voltage to the maximum output voltage. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 78. |
An actuator is usually a device that: |
| A. | converts analog data to meaningful digital data. |
| B. | controls a physical variable. |
| C. | stores digital data and then processes that data according to a set of specified instructions. |
| D. | converts a physical variable to an electrical variable. |
| Answer» C. stores digital data and then processes that data according to a set of specified instructions. | |
| 79. |
Sample-and-hold circuits in A/D converters are designed to: |
| A. | sample and hold the output of the binary counter during the conversion process |
| B. | stabilize the comparator's threshold voltage during the conversion process |
| C. | stabilize the input analog signal during the conversion process |
| D. | sample and hold the D/A converter staircase waveform during the conversion process |
| Answer» D. sample and hold the D/A converter staircase waveform during the conversion process | |
| 80. |
The DSO ________, ________, and ________ analog waveforms. |
| A. | filters, conditions, sends |
| B. | levels, stores, weighs |
| C. | sends, receives, translates |
| D. | digitizes, stores, displays |
| Answer» D. digitizes, stores, displays | |
| 81. |
The practical use of binary-weighted digital-to-analog converters is limited to: |
| A. | R/2R ladder D/A converters |
| B. | 4-bit D/A converters |
| C. | 8-bit D/A converters |
| D. | op-amp comparators |
| Answer» C. 8-bit D/A converters | |
| 82. |
Inaccurate A/D conversion may be due to: |
| A. | constant analog input voltage |
| B. | linear ramp usage |
| C. | intermittent counter inputs |
| D. | faulty sample-and-hold circuitry |
| Answer» E. | |
| 83. |
What circuitry is on an ADC0808 IC? |
| A. | A multiplexer |
| B. | An ADC |
| C. | A 3-bit select input code |
| D. | All of the above |
| Answer» E. | |
| 84. |
Referring to the given figure, what should the display on the scope look like if the A/D converter is working properly? |
| A. | It should be a circular Lissajous pattern resulting from the simultaneous application of ramps to the vertical and horizontal inputs of the oscilloscope. |
| B. | The pattern should be a straight line across the screen due to the equal but opposite voltages being applied to the scope inputs. |
| C. | A uniform stairstep pattern should be displayed. |
| D. | The scope should display a sequential binary count with the LSB on the left and the MSB on the right side of the display. |
| Answer» D. The scope should display a sequential binary count with the LSB on the left and the MSB on the right side of the display. | |
| 85. |
What is the major advantage of the R/2R ladder DAC as compared to a binary-weighted-input DAC? |
| A. | It has fewer parts for the same number of inputs. |
| B. | It is much easier to analyze its operation. |
| C. | It uses only two different resistor values. |
| D. | The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot. |
| Answer» D. The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot. | |
| 86. |
What is the disadvantage to using a counter-ramp type ADC? |
| A. | complex circuit |
| B. | high cost |
| C. | very slow |
| Answer» D. | |
| 87. |
Generally speaking, DACs with a current output will have a shorter settling time than those with voltage outputs. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 88. |
Which of the equations below expresses the voltage gain relationship for an operational amplifier? |
| A. | Vout = Vin/Av |
| B. | Vout/Vin = Rout/Rin |
| C. | Vin/Vout = Rout/Rin |
| D. | Vout/Vin = –Rf/Rin |
| Answer» E. | |
| 89. |
Three characteristics of op amps make them almost ideal amplifiers: very high input impedance, very low impedance, and ________. |
| A. | very high voltage gain |
| B. | unlimited bandwidth |
| C. | a low slew rate |
| D. | very high current gain |
| Answer» B. unlimited bandwidth | |
| 90. |
What is the main disadvantage of the stairstep-ramp A/D converter? |
| A. | The counter must count up from zero at the beginning of each conversion sequence, and the conversion time will vary depending on the input voltage. |
| B. | It requires a counter. |
| C. | It requires a precision clock in order for the conversion to be reliable. |
| D. | All of the above |
| Answer» B. It requires a counter. | |
| 91. |
A certain digital-to-analog converter has a step size of 0.25 V and a full-scale output of 7.75 V. Determine the percent of resolution and the number of input binary bits. |
| A. | 31%, 4 bits |
| B. | 3.23%, 4 bits |
| C. | 31%, 5 bits |
| D. | 3.23%, 5 bits |
| Answer» E. | |
| 92. |
One major difference between a counter-ramp A/D converter and a successive-approximation converter is: |
| A. | the counter-ramp A/D converter is much faster than the successive-approximation converter |
| B. | with the successive-approximation converter the final binary result is always slightly less than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly more |
| C. | with the successive-approximation converter the final binary result is always slightly more than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly less |
| D. | none of the above |
| Answer» C. with the successive-approximation converter the final binary result is always slightly more than the equivalent analog input, whereas with the counter-ramp A/D converter it is slightly less | |
| 93. |
Describe offset error for a DAC. |
| A. | missing codes |
| B. | error in the slope of the output staircase waveform |
| C. | more or less input voltage is required for the first step than what is specified |
| Answer» D. | |
| 94. |
A counter-ramp ADC uses a comparator to compare the input voltage with ________. |
| A. | a binary number |
| B. | the output of a counter |
| C. | the output of a DAC |
| D. | a voltage divider network |
| Answer» D. a voltage divider network | |
| 95. |
What is the output voltage for the circuit shown below? |
| A. | 10 V |
| B. | 20 V |
| C. | 30 V |
| D. | 40 V |
| Answer» D. 40 V | |
| 96. |
When analog inputs from several sources are to be converted, a(n) ________ technique can be used. |
| A. | demultiplexing |
| B. | multiplexing |
| C. | R/2R |
| D. | comparator |
| Answer» C. R/2R | |
| 97. |
An analog-to-digital converter has a four-bit output. How many analog values can it represent? |
| A. | 4 |
| B. | 43556 |
| C. | 16 |
| D. | 0.0625 |
| Answer» D. 0.0625 | |
| 98. |
The main advantage of the SAR ADC method is its high speed. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 99. |
The output of the circuit in the given figure (a) at point X on figure (b) will be ________. |
| A. | 1.011 V |
| B. | 2.75 V |
| C. | –1.011 V |
| D. | –2.75 V |
| Answer» E. | |
| 100. |
What is the acquisition time of the AD1154 sample-and-hold IC? |
| A. | 1.5 s |
| B. | 2.5 s |
| C. | 3.5 s |
| D. | 4.5 s |
| Answer» D. 4.5 s | |