Explore topic-wise MCQs in Digital Electronics.

This section includes 249 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.

201.

When adding an even parity bit to the code 110010, the result is ________.

A. 1110010
B. 1111001
C. 110010
D. 1101
Answer» B. 1111001
202.

The ________ series of IC's are pin, function, and voltage-level compatible with the 74 series IC's.

A. ALS
B. CMOS
C. HCT
D. 2N
Answer» D. 2N
203.

A full-adder has a Cin = 0. What are the sum () and the carry (Cout) when A = 1 and B = 1?

A. = 0, Cout = 0
B. = 0, Cout = 1
C. = 1, Cout = 0
D. = 1, Cout = 1
Answer» C. = 1, Cout = 0
204.

The design concept of using building blocks of circuits in a PLD program is called a(n):

A. hierarchical design.
B. architectural design.
C. digital design.
D. verilog.
Answer» B. architectural design.
205.

Which of the K-maps given below represents the expression X = AC + BC + B?

A. a
B. b
C. c
D. d
Answer» D. d
206.

Which of the following statements accurately represents the two BEST methods of logic circuit simplification?

A. Boolean algebra and Karnaugh mapping
B. Karnaugh mapping and circuit waveform analysis
C. Actual circuit trial and error evaluation and waveform analysis
D. Boolean algebra and actual circuit trial and error evaluation
Answer» B. Karnaugh mapping and circuit waveform analysis
207.

A decoder can be used as a demultiplexer by ________.

A. tying all enable pins LOW
B. tying all data-select lines LOW
C. tying all data-select lines HIGH
D. using the input lines for data selection and an enable line for data input
Answer» E.
208.

Which gate is best used as a basic comparator?

A. NOR
B. OR
C. Exclusive-OR
D. AND
Answer» D. AND
209.

Which of the following is an important feature of the sum-of-products form of expressions?

A. All logic circuits are reduced to nothing more than simple AND and OR operations.
B. The delay times are greatly reduced over other forms.
C. No signal must pass through more than two gates, not including inverters.
D. The maximum number of gates that any signal must pass through is reduced by a factor of two.
Answer» B. The delay times are greatly reduced over other forms.
210.

In an even-parity system, the following data will produce a parity bit = 1.data = 1010011

A. 1
B.
C. 1
D.
Answer» C. 1
211.

________ is a correct combination for an ODD-parity data transmission system.

A. data = 1101 1011 parity = 1
B. data = 1101 0010 parity = 0
C. data = 0001 0101 parity = 1
D. data = 1010 1111 parity = 0
Answer» B. data = 1101 0010 parity = 0
212.

The ________ prefix on IC's indicates a broader operating temperature range, and the devices are generally used by the military.

A. 54
B. 2N
C. 74
D. TTL
Answer» B. 2N
213.

The simplified form of .

A. 1
B.
C. 1
D.
Answer» C. 1
214.

Which of the following combinations of logic gates can decode binary 1101?

A. One 4-input AND gate
B. One 4-input AND gate, one OR gate
C. One 4-input NAND gate, one inverter
D. One 4-input AND gate, one inverter
Answer» E.
215.

Single looping in groups of three is a common K-map simplification technique.

A. 1
B.
Answer» C.
216.

Solve the network in the figure given below for X.

A. A + BC + D
B. ((A + B)C) + D
C. D(A + B + C)
D. (AC + BC)D
Answer» C. D(A + B + C)
217.

For the device shown here, assume the D input is LOW, both S inputs are LOW, and the input is LOW. What is the status of the outputs?

A. All are HIGH.
B. All are LOW.
C. All but are LOW.
D. All but are HIGH.
Answer» E.
218.

An 8-bit binary number is input to an odd parity generator. The parity bit will equal 1 only if ________.

A. the number is odd
B. the number of 1s in the number is odd
C. the number is even
D. the number of 1s in the number is even
Answer» E.
219.

An output gate is connected to four input gates; the circuit does not function. Preliminary tests with the DMM indicate that the power is applied; scope tests show that the primary input gate has a pulsing signal, while the interconnecting node has no signal. The four load gates are all on different ICs. Which instrument will best help isolate the problem?

A. Current tracer
B. Logic probe
C. Oscilloscope
D. Logic analyzer
Answer» B. Logic probe
220.

Each "1" entry in a K-map square represents:

A. a HIGH for each input truth table condition that produces a HIGH output.
B. a HIGH output on the truth table for all LOW input combinations.
C. a LOW output for all possible HIGH input conditions.
D. a DON'T CARE condition for all possible input truth table combinations.
Answer» B. a HIGH output on the truth table for all LOW input combinations.
221.

How many data select lines are required for selecting eight inputs?

A. 1
B. 2
C. 3
D. 4
Answer» D. 4
222.

Which of the following expressions is in the sum-of-products form?

A. (A + B)(C + D)
B. (AB)(CD)
C. AB(CD)
D. AB + CD
Answer» E.
223.

Even parity is the condition of having an even number of 1s in every group of bits.

A. 1
B.
C. 1
D.
Answer» B.
224.

A circuit that can convert one of ten numerical keys pressed on a keyboard to BCD is a ________.

A. priority encoder
B. decoder
C. multiplexer
D. demultiplexer
Answer» B. decoder
225.

Truth tables are great for listing all possible combinations of independent variables.

A. 1
B.
C. 1
D.
Answer» B.
226.

In true sum-of-products expressions, the inversion signs cannot cover more than single variables in a term.

A. 1
B.
Answer» B.
227.

Which of the following expressions is in the product-of-sums form?

A. (A + B)(C + D)
B. (AB)(CD)
C. AB(CD)
D. AB + CD
Answer» B. (AB)(CD)
228.

What is the indication of a short on the input of a load gate?

A. Only the output of the defective gate is affected.
B. There is a signal loss to all gates on the node.
C. The affected node will be stuck in the LOW state.
D. There is a signal loss to all gates on the node, and the affected node will be stuck in the LOW state.
Answer» E.
229.

The implementation of simplified sum-of-products expressions may be easily implemented into actual logic circuits using all universal ________ gates with little or no increase in circuit complexity. (Select the response for the blank space that will BEST make the statement true.)

A. AND/OR
B. NAND
C. NOR
D. OR/AND
Answer» C. NOR
230.

How many 4-bit parallel adders would be required to add two binary numbers each representing decimal numbers up through 30010?

A. 1
B. 2
C. 3
D. 4
Answer» D. 4
231.

In HDL, LITERALS is/are:

A. digital systems.
B. scalars.
C. binary coded decimals.
D. a numbering system.
Answer» C. binary coded decimals.
232.

Which of the figures in figure (a to d) is equivalent to figure (e)?

A. a
B. b
C. c
D. d
Answer» C. c
233.

As a technician you are confronted with a TTL circuit board containing dozens of IC chips. You have taken several readings at numerous IC chips, but the readings are inconclusive because of their erratic nature. Of the possible faults listed, select the one that most probably is causing the problem.

A. A defective IC chip that is drawing excessive current from the power supply
B. A solar bridge between the inputs on the first IC chip on the board
C. An open input on the first IC chip on the board
D. A defective output IC chip that has an internal open to Vcc
Answer» D. A defective output IC chip that has an internal open to Vcc
234.

The carry propagation can be expressed as ________.

A. Cp = AB
B. Cp = A + B
Answer» C.
235.

The device shown here is most likely a ________.

A. comparator
B. multiplexer
C. demultiplexer
D. parity generator
Answer» C. demultiplexer
236.

An encoder in which the highest and lowest value input digits are encoded simultaneously is known as a priority encoder.

A. 1
B.
C. 1
D.
Answer» C. 1
237.

What will a design engineer do after he/she is satisfied that the design will work?

A. Put it in a flow chart
B. Program a chip and test it
C. Give the design to a technician to verify the design
D. Perform a vector test
Answer» C. Give the design to a technician to verify the design
238.

For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be HIGH. What is the status of the Y output?

A. LOW
B. HIGH
C. Don't Care
D. Cannot be determined
Answer» B. HIGH
239.

Convert BCD 0001 0010 0110 to binary.

A. 1111110
B. 1111101
C. 1111000
D. 1111111
Answer» B. 1111101
240.

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A. A > B = 1, A < B = 0, A < B = 1
B. A > B = 0, A < B = 1, A = B = 0
C. A > B = 1, A < B = 0, A = B = 0
D. A > B = 0, A < B = 1, A = B = 1
Answer» D. A > B = 0, A < B = 1, A = B = 1
241.

For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output?

A. LOW
B. HIGH
C. Don't Care
D. Cannot be determined
Answer» B. HIGH
242.

Which of the circuits in figure (a to d) is the sum-of-products implementation of figure (e)?

A. a
B. b
C. c
D. d
Answer» E.
243.

In VHDL, macrofunctions is/are:

A. digital circuits.
B. analog circuits.
C. a set of bit vectors.
D. preprogrammed TTL devices.
Answer» E.
244.

For a two-input XNOR gate, with the input waveforms as shown below, which output waveform is correct?

A. a
B. b
C. c
D. d
Answer» E.
245.

For the XNOR gate truth table shown below, the values for w, x, y, and z are ____, ____, ____, and ____, respectively.

A. 1, 0, 0, 1
B. 0, 1, 0, 1
C. 1, 1, 1, 0
D. 1, 0, 0, 0
Answer» B. 0, 1, 0, 1
246.

How many outputs would two 8-line-to-3-line encoders, expanded to a 16-line-to-4-line encoder, have?

A. 3
B. 4
C. 5
D. 6
Answer» C. 5
247.

Which of the figures shown below represents the exclusive-NOR gate?

A. a
B. b
C. c
D. d
Answer» C. c
248.

For the device shown here, assume the D input is LOW, both S inputs are HIGH, and the input is HIGH. What is the status of the outputs?

A. All are HIGH.
B. All are LOW.
C. All but are LOW.
D. All but are HIGH.
Answer» B. All are LOW.
249.

How many 3-line-to-8-line decoders are required for a 1-of-32 decoder?

A. 1
B. 2
C. 4
D. 8
Answer» D. 8