249 + Mcqs in Combinational Logic Circuits Page 4 McqOptions

151.	After each circuit in a subsection of a VHDL program has been ________, they can be combined and the subsection can be tested.
A.	designed
B.	tested
C.	engineered
D.	produced
Answer» C. engineered

Discussion

152.	This is an example of a POS expression:
A.	1
B.
Answer» B.

Discussion

153.	A good rule of thumb for determining the pin numbers of dual-in-line package IC chips would be to place the notch to your right and pin #1 will always be in the lower right corner.
A.	1
B.
Answer» C.

Discussion

154.	The ________ circuit produces a HIGH output whenever the two inputs are equal.
A.	exclusive-AND
B.	exclusive-NAND
C.	exclusive-NOR
D.	exclusive-OR
Answer» D. exclusive-OR

Discussion

155.	The following combination is correct for an EVEN parity data transmission system: data = 100111100 and parity = 0
A.	1
B.
Answer» C.

Discussion

156.	The ________ statement evaluates the variable status.
A.	IF/THEN
B.	IF/THEN/ELSE
C.	CASE
D.	ELSIF
Answer» B. IF/THEN/ELSE

Discussion

157.	In an even-parity system, the parity bit is adjusted to make an even number of one bits.
A.	1
B.
Answer» B.

Discussion

158.	One reason for using the sum-of-products form is that it can be implemented using all ________ gates without much difficulty.
A.	NOR
B.	NAND
C.	AND
D.	DOOR
Answer» C. AND

Discussion

159.	is in the form of a sum-of-products expression.
A.	1
B.
Answer» B.

Discussion

160.	The largest truth table that can be implemented directly with an 8-line-to-1-line MUX has ________.
A.	3 rows
B.	4 rows
C.	8 rows
D.	16 rows
Answer» D. 16 rows

Discussion

161.	The look-ahead carry method suffers from propagation delays.
A.	1
B.
Answer» C.

Discussion

162.	The ________ circuit produces a HIGH output whenever the two inputs are unequal.
A.	exclusive-AND
B.	exclusive-NOR
C.	exclusive-OR
D.	inexclusive-OR
Answer» D. inexclusive-OR

Discussion

163.	The input at the 1, 2, 4, 8 inputs to a 4-line to 16-line decoder with active-low outputs is 1110. As a result, output line 7 is driven LOW.
A.	1
B.
Answer» C.

Discussion

164.	VHDL is very strict in the way it allows us to assign and compare ________ such as signals, variables, constants, and literals.
A.	objects
B.	LOGIC_VECTORS
C.	designs
D.	arrays
Answer» B. LOGIC_VECTORS

Discussion

165.	The AND-OR-INVERT gates are designed to simplify implementation of ________.
A.	POS logic
B.	DeMorgan's theorem
C.	NAND logic
D.	SOP logic
Answer» C. NAND logic

Discussion

166.	TTL stands for transistor-technology-logic.
A.	1
B.
Answer» C.

Discussion

167.	A Karnaugh map will ________.
A.	eliminate the need for tedious Boolean simplifications
B.	allow any circuit to be implemented with just AND and OR gates
C.	produce the simplest sum-of-products expression
D.	give an overall picture of how the signals flow through the logic circuit
Answer» B. allow any circuit to be implemented with just AND and OR gates

Discussion

168.	An exclusive-OR gate will invert a signal on one input if the other is always HIGH.
A.	1
B.
Answer» B.

Discussion

169.	A digital circuit that converts coded information into a familiar or non-coded form is known as an encoder.
A.	1
B.
Answer» C.

Discussion

170.	When an open occurs on the input of a CMOS gate, the output will ________.
A.	go LOW, because there is no current in an open circuit
B.	react as if the open input were a HIGH
C.	go HIGH, since full voltage appears across an open
D.	be unpredictable; it may go HIGH or LOW
Answer» E.

Discussion

171.	The CASE control structure is used when an expression has a list of possible values.
A.	1
B.
Answer» B.

Discussion

172.	Parity generation and checking is used to detect ________.
A.	which of two numbers is greater
B.	errors in binary data transmission
C.	errors in arithmetic in computers
D.	when a binary counter counts incorrectly
Answer» C. errors in arithmetic in computers

Discussion

173.	When Karnaugh mapping, we must be sure to use the ________ number of loops.
A.	maximum
B.	minimum
C.	median
D.	Karnaugh
Answer» C. median

Discussion

174.	The carry output of each adder in a ripple adder provides an additional sum output bit.
A.	1
B.
Answer» B.

Discussion

175.	The Boolean equation results from this Karnaugh map.
A.	1
B.
Answer» B.

Discussion

176.	The final output of a POS circuit is generated by ________.
A.	an AND
B.	an OR
C.	a NOR
D.	a NAND
Answer» B. an OR

Discussion

177.	The XOR gate will produce a HIGH output if only one but not both of the inputs is HIGH.
A.	1
B.
Answer» B.

Discussion

178.	The output of a gate has an internal short; a current tracer will ________.
A.	identify the defective gate
B.	show whether the gate is shorted to Vcc or ground
C.	probably not be able to locate the problem
D.	be able to identify the defective load node
Answer» B. show whether the gate is shorted to Vcc or ground

Discussion

179.	The circuit given below implements the equation, .
A.	1
B.
Answer» B.

Discussion

180.	A gate that could be used to compare two logic levels and provide a HIGH output if they are equal is a(n) ________.
A.	XOR gate
B.	XNOR gate
C.	NAND gate
D.	NOR gate
Answer» C. NAND gate

Discussion

181.	When an open occurs on the input of a TTL device, the output will ________.
A.	go LOW, because there is no current in an open circuit
B.	react as if the open input were a HIGH
C.	go HIGH, since full voltage appears across an open
D.	still be good, if only the good inputs are used
Answer» C. go HIGH, since full voltage appears across an open

Discussion

182.	When decisions demand one of many possible actions, the ELSIF control structure is used.
A.	1
B.
Answer» B.

Discussion

183.	A data selector is also called a demultiplexer.
A.	1
B.
C.	1
D.
Answer» C. 1

Discussion

184.	The Boolean equation of the exclusive-NOR function is .
A.	1
B.
C.	1
D.
Answer» B.

Discussion

185.	A combinatorial logic circuit has memory characteristics that "remember" the inputs after they have been removed.
A.	1
B.
Answer» C.

Discussion

186.	What type of logic circuit is represented by the figure shown below?
A.	XOR
B.	XNOR
C.	XAND
D.	XNAND
Answer» C. XAND

Discussion

187.	Three select lines are required to address four data input lines.
A.	1
B.
Answer» C.

Discussion

188.	Parity generators and checkers use ________ gates.
A.	exclusive-AND
B.	exclusive-OR/NOR
C.	exclusive-OR
D.	exclusive-NAND
Answer» C. exclusive-OR

Discussion

189.	How many 1-of-16 decoders are required for decoding a 7-bit binary number?
A.	5
B.	6
C.	7
D.	8
Answer» E.

Discussion

190.	What is the indication of a short to ground in the output of a driving gate?
A.	Only the output of the defective gate is affected.
B.	There is a signal loss to all load gates.
C.	The node may be stuck in either the HIGH or the LOW state.
D.	The affected node will be stuck in the HIGH state.
Answer» C. The node may be stuck in either the HIGH or the LOW state.

Discussion

191.	In VHDL, data can be each of the following types except ________.
A.	BIT
B.	BIT_VECTOR
C.	STD_LOGIC
D.	STD_VECTOR
Answer» E.

Discussion

192.	Convert BCD 0001 0111 to binary.
A.	10101
B.	10010
C.	10001
D.	11000
Answer» D. 11000

Discussion

193.	Two 4-bit binary numbers (1011 and 1111) are applied to a 4-bit parallel adder. The carry input is 1. What are the values for the sum and carry output?
A.	4321 = 0111, Cout = 0
B.	4321 = 1111, Cout = 1
C.	4321 = 1011, Cout = 1
D.	4321 = 1100, Cout = 1
Answer» D. 4321 = 1100, Cout = 1

Discussion

194.	Looping on a K-map always results in the elimination of:
A.	variables within the loop that appear only in their complemented form.
B.	variables that remain unchanged within the loop.
C.	variables within the loop that appear in both complemented and uncomplemented form.
D.	variables within the loop that appear only in their uncomplemented form.
Answer» D. variables within the loop that appear only in their uncomplemented form.

Discussion

195.	The 54 prefix on ICs indicates a broader operating temperature range, generally intended for military use.
A.	1
B.
C.	1
D.
Answer» B.

Discussion

196.	Except for ________, STD_LOGIC may have the following values.
A.	'z'
B.	'U'
C.	'?'
D.	'L'
Answer» D. 'L'

Discussion

197.	A certain BCD-to-decimal decoder has active-HIGH inputs and active-LOW outputs. Which output goes LOW when the inputs are 1001?
A.	0
B.	3
C.	9
D.	None. All outputs are HIGH.
Answer» D. None. All outputs are HIGH.

Discussion

198.	Based on the indications of probe A in the figure given below, what is wrong, if anything, with the circuit?
A.	The logic probe is unable to determine the state of the circuit at that point and is blinking to alert the technician to the problem.
B.	The output appears to be shorted to Vcc, but is being pulsed by the pulser.
C.	The output appears to be LOW, but is being pulsed by the pulser.
D.	Nothing appears to be wrong at that point.
Answer» E.

Discussion

199.	A half-adder does not have ________.
A.	carry in
B.	carry out
C.	two inputs
D.	all of the above
Answer» B. carry out

Discussion

200.	A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?
A.	The output of the gate appears to be open.
B.	The dim indication on the logic probe indicates that the supply voltage is probably low.
C.	The dim indication is a result of a bad ground connection on the logic probe.
D.	The gate may be a tristate device.
Answer» B. The dim indication on the logic probe indicates that the supply voltage is probably low.

Discussion

Explore topic-wise MCQs in Digital Electronics.

After each circuit in a subsection of a VHDL program has been ________, they can be combined and the subsection can be tested.

This is an example of a POS expression:

A good rule of thumb for determining the pin numbers of dual-in-line package IC chips would be to place the notch to your right and pin #1 will always be in the lower right corner.

The ________ circuit produces a HIGH output whenever the two inputs are equal.

The following combination is correct for an EVEN parity data transmission system: data = 100111100 and parity = 0

The ________ statement evaluates the variable status.

In an even-parity system, the parity bit is adjusted to make an even number of one bits.

One reason for using the sum-of-products form is that it can be implemented using all ________ gates without much difficulty.

is in the form of a sum-of-products expression.

The largest truth table that can be implemented directly with an 8-line-to-1-line MUX has ________.

The look-ahead carry method suffers from propagation delays.

The ________ circuit produces a HIGH output whenever the two inputs are unequal.

The input at the 1, 2, 4, 8 inputs to a 4-line to 16-line decoder with active-low outputs is 1110. As a result, output line 7 is driven LOW.

VHDL is very strict in the way it allows us to assign and compare ________ such as signals, variables, constants, and literals.

The AND-OR-INVERT gates are designed to simplify implementation of ________.

TTL stands for transistor-technology-logic.

A Karnaugh map will ________.

An exclusive-OR gate will invert a signal on one input if the other is always HIGH.

A digital circuit that converts coded information into a familiar or non-coded form is known as an encoder.

When an open occurs on the input of a CMOS gate, the output will ________.

The CASE control structure is used when an expression has a list of possible values.

Parity generation and checking is used to detect ________.

When Karnaugh mapping, we must be sure to use the ________ number of loops.

The carry output of each adder in a ripple adder provides an additional sum output bit.

The Boolean equation results from this Karnaugh map.

The final output of a POS circuit is generated by ________.

The XOR gate will produce a HIGH output if only one but not both of the inputs is HIGH.

The output of a gate has an internal short; a current tracer will ________.

The circuit given below implements the equation, .

A gate that could be used to compare two logic levels and provide a HIGH output if they are equal is a(n) ________.

When an open occurs on the input of a TTL device, the output will ________.

When decisions demand one of many possible actions, the ELSIF control structure is used.

A data selector is also called a demultiplexer.

The Boolean equation of the exclusive-NOR function is .

A combinatorial logic circuit has memory characteristics that "remember" the inputs after they have been removed.

What type of logic circuit is represented by the figure shown below?

Three select lines are required to address four data input lines.

Parity generators and checkers use ________ gates.

How many 1-of-16 decoders are required for decoding a 7-bit binary number?

What is the indication of a short to ground in the output of a driving gate?

In VHDL, data can be each of the following types except ________.

Convert BCD 0001 0111 to binary.

Two 4-bit binary numbers (1011 and 1111) are applied to a 4-bit parallel adder. The carry input is 1. What are the values for the sum and carry output?

Looping on a K-map always results in the elimination of:

The 54 prefix on ICs indicates a broader operating temperature range, generally intended for military use.

Except for ________, STD_LOGIC may have the following values.

A certain BCD-to-decimal decoder has active-HIGH inputs and active-LOW outputs. Which output goes LOW when the inputs are 1001?

Based on the indications of probe A in the figure given below, what is wrong, if anything, with the circuit?

A half-adder does not have ________.

A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?