MCQOPTIONS
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MCQOPTIONS
This section includes 106 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
When reading a Boolean expression, what does the word "NOT" indicate? |
| A. | the same as |
| B. | inversion |
| C. | high |
| D. | low |
| Answer» C. high | |
| 52. |
What is the Boolean expression for a three-input AND gate? |
| A. | X = A + B + C |
| B. | X = A · B · C |
| C. | A – B – C |
| D. | A $ B $ C |
| Answer» C. A ‚Äì B ‚Äì C | |
| 53. |
The gates in this figure are implemented using TTL logic. If the output of the inverter is open, and you apply logic pulses to point B, the output of the AND gate will be ________. |
| A. | a steady LOW |
| B. | a steady HIGH |
| C. | an undefined level |
| D. | pulses |
| Answer» E. | |
| 54. |
Which of the following gates has the exact inverse output of the OR gate for all possible input combinations? |
| A. | NOR |
| B. | NOT |
| C. | NAND |
| D. | AND |
| Answer» B. NOT | |
| 55. |
A CMOS IC operating from a 3-volt supply will consume ________. |
| A. | less power than a TTL IC |
| B. | more power than a TTL IC |
| C. | the same power as a TTL IC |
| D. | no power at all |
| Answer» B. more power than a TTL IC | |
| 56. |
The output of a NAND gate is LOW if ________. |
| A. | all inputs are LOW |
| B. | all inputs are HIGH |
| C. | any input is LOW |
| D. | any input is HIGH |
| Answer» C. any input is LOW | |
| 57. |
The logic gate that will have HIGH or "1" at its output when any one (or more) of its inputs is HIGH is a(n): |
| A. | OR gate |
| B. | AND gate |
| C. | NOR gate |
| D. | NOT operation |
| Answer» B. AND gate | |
| 58. |
With regard to an AND gate, which statement is true? |
| A. | An AND gate has two inputs and one output. |
| B. | An AND gate has two or more inputs and two outputs. |
| C. | If one input to a 2-input AND gate is HIGH, the output reflects the other input. |
| D. | A 2-input AND gate has eight input possibilities. |
| Answer» D. A 2-input AND gate has eight input possibilities. | |
| 59. |
Fan-out is specified in terms of ________. |
| A. | voltage |
| B. | current |
| C. | wattage |
| D. | unit loads |
| Answer» E. | |
| 60. |
The Boolean expression for a 3-input OR gate is ________. |
| A. | X = A + B |
| B. | X = A + B + C |
| C. | X = ABC |
| D. | X = A + BC |
| Answer» C. X = ABC | |
| 61. |
An exclusive-NOR gate output is HIGH when the inputs are unequal. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 62. |
The NOR logic gate is the same as the operation of the ________ gate with an inverter connected to the output. |
| A. | OR |
| B. | AND |
| C. | NAND |
| D. | none of the above |
| Answer» B. AND | |
| 63. |
A logic probe is used to test the pins of a 7411 IC with the following results. Is there a problem with the chip and if so, what is the problem? |
| A. | Pin 6 should be ON. |
| B. | Pin 6 should be pulsing. |
| C. | Pin 8 should be ON. |
| D. | no problem |
| Answer» C. Pin 8 should be ON. | |
| 64. |
The basic types of programmable arrays are made up of ________. |
| A. | AND gates |
| B. | OR gates |
| C. | NAND and NOR gates |
| D. | AND gates and OR gates |
| Answer» E. | |
| 65. |
A clock signal with a period of 1 s is applied to the input of an enable gate. The output must contain six pulses. How long must the enable pulse be active? |
| A. | Enable must be active for 0 s. |
| B. | Enable must be active for 3 s. |
| C. | Enable must be active for 6 s. |
| D. | Enable must be active for 12 s. |
| Answer» D. Enable must be active for 12 s. | |
| 66. |
Logically, the output of a NOR gate would have the same Boolean expression as a(n): |
| A. | NAND gate immediately followed by an inverter |
| B. | OR gate immediately followed by an inverter |
| C. | AND gate immediately followed by an inverter |
| D. | NOR gate immediately followed by an inverter |
| Answer» C. AND gate immediately followed by an inverter | |
| 67. |
If the input to a NOT gate is A and the output is X, then ________. |
| A. | X = A |
| B. | |
| C. | X = 0 |
| Answer» C. X = 0 | |
| 68. |
The power dissipation, PD, of a logic gate is the product of the ________. |
| A. | dc supply voltage and the peak current |
| B. | dc supply voltage and the average supply current |
| C. | ac supply voltage and the peak current |
| D. | ac supply voltage and the average supply current |
| Answer» C. ac supply voltage and the peak current | |
| 69. |
A 2-input NOR gate is equivalent to a ________. |
| A. | negative-OR gate |
| B. | negative-AND gate |
| C. | negative-NAND gate |
| D. | none of the above |
| Answer» C. negative-NAND gate | |
| 70. |
If a 3-input OR gate has eight input possibilities, how many of those possibilities will result in a HIGH output? |
| A. | 1 |
| B. | 2 |
| C. | 7 |
| D. | 8 |
| Answer» D. 8 | |
| 71. |
A NOR gate and an OR gate operate in exactly the same way. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 72. |
Which of the following is not a basic Boolean operation? |
| A. | OR |
| B. | NOT |
| C. | AND |
| D. | FOR |
| Answer» E. | |
| 73. |
The logic gate that will have a LOW output when any one of its inputs is HIGH is the: |
| A. | NAND gate |
| B. | AND gate |
| C. | NOR gate |
| D. | OR gate |
| Answer» D. OR gate | |
| 74. |
The switching speed of CMOS is now ________. |
| A. | competitive with TTL |
| B. | three times that of TTL |
| C. | slower than TTL |
| D. | twice that of TTL |
| Answer» B. three times that of TTL | |
| 75. |
Good troubleshooting is done by looking at the input signal and how it interacts with the circuits. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 76. |
What is the name of a digital circuit that produces several repetitive digital waveforms? |
| A. | an inverter |
| B. | an OR gate |
| C. | a Johnson shift counter |
| D. | an AND gate |
| Answer» D. an AND gate | |
| 77. |
What does the small bubble on the output of the NAND gate logic symbol mean? |
| A. | open collector output |
| B. | tristate |
| C. | The output is inverted. |
| D. | none of the above |
| Answer» D. none of the above | |
| 78. |
The AND function can be used to ________ and the OR function can be used to ________ . |
| A. | enable, disable |
| B. | disable, enable |
| C. | enable or disable, enable or disable |
| D. | detect, invert |
| Answer» D. detect, invert | |
| 79. |
How many truth table entries are necessary for a four-input circuit? |
| A. | 4 |
| B. | 8 |
| C. | 12 |
| D. | 16 |
| Answer» E. | |
| 80. |
A NOR gate output is LOW if any of its inputs is LOW. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 81. |
Which of the following gates is described by the expression ? |
| A. | OR |
| B. | AND |
| C. | NOR |
| D. | NAND |
| Answer» E. | |
| 82. |
How many inputs are on the logic gates of a 74HC21 IC? |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» E. | |
| 83. |
How many inputs of a four-input AND gate must be HIGH in order for the output of the logic gate to go HIGH? |
| A. | any one of the inputs |
| B. | any two of the inputs |
| C. | any three of the inputs |
| D. | all four inputs |
| Answer» E. | |
| 84. |
As a rule, CMOS has the lowest power consumption of all IC families. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 85. |
The terms "low speed" and "high speed," applied to logic circuits, refer to the ________. |
| A. | rise time |
| B. | fall time |
| C. | propagation delay time |
| D. | clock speed |
| Answer» D. clock speed | |
| 86. |
Which of the following equations would accurately describe a four-input OR gate when A = 1, B = 1, C = 0, and D = 0? |
| A. | 1 + 1 + 0 + 0 = 01 |
| B. | 1 + 1 + 0 + 0 = 1 |
| C. | 1 + 1 + 0 + 0 = 0 |
| D. | 1 + 1 + 0 + 0 = 00 |
| Answer» C. 1 + 1 + 0 + 0 = 0 | |
| 87. |
The Boolean expression for a 3-input AND gate is ________. |
| A. | X = AB |
| B. | X = ABC |
| C. | X = A + B + C |
| D. | X = AB + C |
| Answer» C. X = A + B + C | |
| 88. |
A device used to display one or more digital signals so that they can be compared to expected timing diagrams for the signals is a: |
| A. | DMM |
| B. | spectrum analyzer |
| C. | logic analyzer |
| D. | frequency counter |
| Answer» D. frequency counter | |
| 89. |
If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n): |
| A. | AND |
| B. | NAND |
| C. | NOR |
| D. | OR |
| Answer» C. NOR | |
| 90. |
How many entries would a truth table for a four-input NAND gate have? |
| A. | 2 |
| B. | 8 |
| C. | 16 |
| D. | 32 |
| Answer» D. 32 | |
| 91. |
The output of an OR gate with three inputs, A, B, and C, is LOW when ________. |
| A. | A = 0, B = 0, C = 0 |
| B. | A = 0, B = 0, C = 1 |
| C. | A = 0, B = 1, C = 1 |
| D. | all of the above |
| Answer» B. A = 0, B = 0, C = 1 | |
| 92. |
If the output of a three-input AND gate must be a logic LOW, what must the condition of the inputs be? |
| A. | All inputs must be LOW. |
| B. | All inputs must be HIGH. |
| C. | At least one input must be LOW. |
| D. | At least one input must be HIGH. |
| Answer» D. At least one input must be HIGH. | |
| 93. |
When used with an IC, what does the term "QUAD" indicate? |
| A. | 2 circuits |
| B. | 4 circuits |
| C. | 6 circuits |
| D. | 8 circuits |
| Answer» C. 6 circuits | |
| 94. |
CMOS IC packages are available in ________. |
| A. | DIP configuration |
| B. | SOIC configuration |
| C. | DIP and SOIC configurations |
| D. | neither DIP nor SOIC configurations |
| Answer» D. neither DIP nor SOIC configurations | |
| 95. |
What are the pin numbers of the outputs of the gates in a 7432 IC? |
| A. | 3, 6, 10, and 13 |
| B. | 1, 4, 10, and 13 |
| C. | 3, 6, 8, and 11 |
| D. | 1, 4, 8, and 11 |
| Answer» D. 1, 4, 8, and 11 | |
| 96. |
What is the circuit number of the IC that contains four two-input AND gates in standard TTL? |
| A. | 7402 |
| B. | 7404 |
| C. | 7408 |
| D. | 7432 |
| Answer» D. 7432 | |
| 97. |
The gates in this figure are implemented using TTL logic. If the input of the inverter is open, and you apply logic pulses to point B, the output of the AND gate will be ________. |
| A. | a steady LOW |
| B. | a steady HIGH |
| C. | an undefined level |
| D. | pulses |
| Answer» B. a steady HIGH | |
| 98. |
How many AND gates are found in a 7411 IC? |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» D. 4 | |
| 99. |
A logic probe is again applied to the pins of a 7421 IC with the following results. Is there a problem with the circuit and if so, what is the problem? |
| A. | Pin 6 should be ON. |
| B. | Pin 8 should be ON. |
| C. | Pin 8 should be pulsing. |
| D. | no problem |
| Answer» E. | |
| 100. |
One advantage TTL has over CMOS is that TTL is ________. |
| A. | less expensive |
| B. | not sensitive to electrostatic discharge |
| C. | faster |
| D. | more widely available |
| Answer» C. faster | |