MCQOPTIONS
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MCQOPTIONS
This section includes 22 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
Determine odd parity for each of the following data words: 1011101 11110111 1001101 |
| A. | P = 1, P = 1, P = 0 |
| B. | P = 0, P = 0, P = 0 |
| C. | P = 1, P = 1, P = 1 |
| D. | P = 0, P = 0, P = 1 |
| Answer» E. | |
| 2. |
A parity checker is constructed in the same way as a parity generator, except that in a 4-bit system there must be five inputs, and the output is used as the error indicator. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 3. |
The Ex-NOR is sometimes called the equality gate. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 4. |
In a parity generator circuit, an error is signaled on an error indicator. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 5. |
Parity generator and checker circuits are available in single IC packages. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 6. |
Electrical noise does not affect the transmission of binary information. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 7. |
The exclusive-OR is written in a Boolean equation as a plus sign with a circle around it. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 8. |
Show from the truth table how an exclusive-OR gate can be used to invert the data on one input if the other input is a special control function. |
| A. | Using A as the control, when A = 0, X is the same as B. When A = 1, X is the same as B. |
| B. | Using A as the control, when A = 0, X is the same as B. When A = 1, X is the inverse of B. |
| C. | Using A as the control, when A = 0, X is the inverse of B. When A = 1, X is the same as B. |
| D. | Using A as the control, when A = 0, X is the inverse of B. When A = 1, X is the inverse of B. |
| Answer» C. Using A as the control, when A = 0, X is the inverse of B. When A = 1, X is the same as B. | |
| 9. |
The exclusive-OR provides a LOW input if one input or the other input is HIGH. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 10. |
Which type of gate can be used to add two bits? |
| A. | Ex-OR |
| B. | Ex-NOR |
| C. | Ex-NAND |
| D. | NOR |
| Answer» B. Ex-NOR | |
| 11. |
Why is an exclusive-NOR gate also called an equality gate? |
| A. | The output is false if the inputs are equal. |
| B. | The output is true if the inputs are opposite. |
| C. | The output is true if the inputs are equal. |
| Answer» D. | |
| 12. |
In an exclusive-OR, both inputs cannot be HIGH to provide a HIGH output. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 13. |
Using the CPLD design environment, we can simulate any combinations of inputs and observe the resulting output to check for proper circuit operation. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 14. |
Determine odd parity for each of the following data words: 1011101        11110111        1001101 |
| A. | P = 1, P = 1, P = 0 |
| B. | P = 0, P = 0, P = 0 |
| C. | P = 1, P = 1, P = 1 |
| D. | P = 0, P = 0, P = 1 |
| Answer» E. | |
| 15. |
Identify the type of gate below from the equation |
| A. | Ex-NOR gate |
| B. | OR gate |
| C. | Ex-OR gate |
| D. | NAND gate |
| Answer» D. NAND gate | |
| 16. |
A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n): |
| A. | Ex-NOR gate |
| B. | OR gate |
| C. | Ex-OR gate |
| D. | NAND gate |
| Answer» D. NAND gate | |
| 17. |
The Ex-NOR is sometimes called the ________. |
| A. | parity gate |
| B. | equality gate |
| C. | inverted OR |
| D. | parity gate or the equality gate |
| Answer» C. inverted OR | |
| 18. |
The odd/even parity system would require a sixth bit to be added to a 4-bit system. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 19. |
How is odd parity generated differently from even parity? |
| A. | The first output is inverted. |
| B. | The last output is inverted. |
| Answer» C. | |
| 20. |
Parity systems are defined as either________ or ________ and will add an extra ________ to the digital information being transmitted. |
| A. | positive, negative, byte |
| B. | odd, even, bit |
| C. | upper, lower, digit |
| D. | on, off, decimal |
| Answer» C. upper, lower, digit | |
| 21. |
A logic circuit that provides a HIGH output for both inputs HIGH or both inputs LOW is a(n): |
| A. | Ex-NOR gate |
| B. | OR gate |
| C. | Ex-OR gate |
| D. | NAND gate |
| Answer» B. OR gate | |
| 22. |
Select the statement that best describes the parity method of error detection: |
| A. | Parity checking is best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. |
| B. | Parity checking is not suitable for detecting single-bit errors in transmitted codes. |
| C. | Parity checking is best suited for detecting single-bit errors in transmitted codes. |
| D. | Parity checking is capable of detecting and correcting errors in transmitted codes. |
| Answer» D. Parity checking is capable of detecting and correcting errors in transmitted codes. | |