MCQOPTIONS
Saved Bookmarks
MCQOPTIONS
This section includes 26 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
During the calculation of load capacitance of a 1st stage CMOS inverter, the input node capacitances, Cgs, n and Cgs, p of the 2nd stage CMOS inverter is also considered. |
| A. | True |
| B. | False |
| Answer» C. | |
| 2. |
While measuring the output load capacitance Cgs, n and Cgs, p is not considered. Why? |
| A. | Because Cgs, n and Cgs, p are the capacitances at the input nodes |
| B. | Because Cgs, n and Cgs, p does not exist during the operation of CMOS inverter |
| C. | Because Cgs, n and Cgs, p are storing opposite charges and cancel out each other during the calculation of load capacitance |
| D. | None of the mentioned |
| Answer» B. Because Cgs, n and Cgs, p does not exist during the operation of CMOS inverter | |
| 3. |
Which layer has high resistance value? |
| A. | polysilicon |
| B. | silicide |
| C. | diffusion |
| D. | metal |
| Answer» B. silicide | |
| 4. |
Which layer has high capacitance value? |
| A. | metal |
| B. | diffusion |
| C. | silicide |
| D. | polysilicon |
| Answer» C. silicide | |
| 5. |
Which has a high voltage drop? |
| A. | metal layer |
| B. | polysilicon layer |
| C. | diffusion layer |
| D. | silicide layer |
| Answer» C. diffusion layer | |
| 6. |
Polysilicon is suitable for ___________ |
| A. | small distance |
| B. | large distance |
| C. | all of the mentioned’ |
| D. | none of the mentioned |
| Answer» B. large distance | |
| 7. |
Diffusion capacitance is equal to ___________ |
| A. | area capacitance |
| B. | peripheral capacitance |
| C. | fringing field capacitance |
| D. | area capacitance + peripheral capacitance |
| Answer» E. | |
| 8. |
For greater relative value of peripheral capacitance ___________ should be small. |
| A. | source area |
| B. | drain area |
| C. | source & drain area |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 9. |
Peripheral capacitance is given in _________ eper unit length. |
| A. | nano farad |
| B. | pico farad |
| C. | micro farad |
| D. | farad |
| Answer» C. micro farad | |
| 10. |
Interlayer capacitance occurs due to ___________ |
| A. | separation between plates |
| B. | electric field between plates |
| C. | charges between plates |
| D. | parallel plate effect |
| Answer» E. | |
| 11. |
Total wire capacitance is equal to ___________ |
| A. | area capacitance |
| B. | fringing field capacitance |
| C. | area capacitance + fringing field capacitance |
| D. | peripheral capacitance |
| Answer» D. peripheral capacitance | |
| 12. |
Which contributes to the wiring capacitance? |
| A. | fringing fields |
| B. | interlayer capacitance |
| C. | peripheral capacitance |
| D. | all of the mentioned |
| Answer» E. | |
| 13. |
WHICH_HAS_HIGH_VOLTAGE_DROP??$ |
| A. | metal layer |
| B. | polysilicon layer |
| C. | diffusion layer |
| D. | silicide layer |
| Answer» C. diffusion layer | |
| 14. |
Which layer has high resistance value?$ |
| A. | polysilicon |
| B. | silicide |
| C. | diffusion |
| D. | metal |
| Answer» B. silicide | |
| 15. |
Which layer has high capacitance value?$ |
| A. | metal |
| B. | diffusion |
| C. | silicide |
| D. | polysilicon |
| Answer» C. silicide | |
| 16. |
During the calculation of load capacitance of a 1st stage CMOS inverter, the input node capacitances, Cgs,n and Cgs,p of the 2nd stage CMOS inverter is also considered. |
| A. | True |
| B. | False |
| Answer» C. | |
| 17. |
While measuring the output load capacitance Cgs,n and Cgs,p is not considered. Why? |
| A. | Because Cgs,n and Cgs,p are the capacitances at the input nodes. |
| B. | Because Cgs,n and Cgs,p does not exist during the operation of CMOS inverter |
| C. | Because Cgs,n and Cgs,p are storing opposite charges and cancel out each other during calculation of load capacitance |
| D. | None of the mentioned |
| Answer» B. Because Cgs,n and Cgs,p does not exist during the operation of CMOS inverter | |
| 18. |
Polysilicon is suitable fo? |
| A. | small distance |
| B. | large distance |
| C. | all of the mentioned’ |
| D. | none of the mentioned |
| Answer» B. large distance | |
| 19. |
Diffusion capacitance is equal to |
| A. | area capacitance |
| B. | peripheral capacitance |
| C. | fringing field capacitance |
| D. | area capacitance + peripheral capacitance |
| Answer» E. | |
| 20. |
For greater relative value of peripheral capacitance, _______ should be small |
| A. | source area |
| B. | drain area |
| C. | both of the mentioned |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 21. |
Peripheral capacitance is given in _____ eper unit length |
| A. | nano farad |
| B. | pico farad |
| C. | micro farad |
| D. | farad |
| Answer» C. micro farad | |
| 22. |
Which capacitance must be higher? |
| A. | metal to polysilicon capacitance |
| B. | metal to substrate capacitance |
| C. | metal to metal capacitance |
| D. | diffusion capacitance |
| Answer» B. metal to substrate capacitance | |
| 23. |
Interlayer capacitance occurs due to |
| A. | separation between plates |
| B. | electric field between plates |
| C. | charges between plates |
| D. | parallel plate effect |
| Answer» E. | |
| 24. |
Total wire capacitance is equal to |
| A. | area capacitance |
| B. | fringing field capacitance |
| C. | area capacitance + fringing field capacitance |
| D. | peripheral capacitance |
| Answer» D. peripheral capacitance | |
| 25. |
What does the value d in fringing field capacitance measures? |
| A. | thickness of wire |
| B. | length of the wire |
| C. | wire to substrate separation |
| D. | wire to wire separation |
| Answer» D. wire to wire separation | |
| 26. |
Which contribute to the wiring capacitance? |
| A. | fringing fields |
| B. | interlayer capacitance |
| C. | peripheral capacitance |
| D. | all of the mentioned |
| Answer» E. | |