 
			 
			MCQOPTIONS
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				This section includes 13 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. | Which method has high over head cost? | 
| A. | lssd | 
| B. | partial scan | 
| C. | scan/set | 
| D. | random access scan | 
| Answer» D. random access scan | |
| 2. | Scan/set method has no interruption to normal operation. | 
| A. | true | 
| B. | false | 
| Answer» B. false | |
| 3. | Which has more number of I/O pins? | 
| A. | lssd | 
| B. | partial scan | 
| C. | scan/set | 
| D. | random access scan | 
| Answer» E. | |
| 4. | In test mode, storage elements are connected as | 
| A. | parallel shift registers | 
| B. | serial shift register | 
| C. | combiners | 
| D. | buffers | 
| Answer» C. combiners | |
| 5. | In level sensitive aspect, when an input change occurs, the response in | 
| A. | dependent of components | 
| B. | dependent on wiring delays | 
| C. | independent of wiring delays | 
| D. | independent of input combinations | 
| Answer» D. independent of input combinations | |
| 6. | The scan path shift register is verified by | 
| A. | shifting in all zeroes first | 
| B. | shifting in all ones first | 
| C. | adding all ones | 
| D. | adding all zeroes | 
| Answer» C. adding all ones | |
| 7. | The efficiency of the test pattern generation is improved by | 
| A. | adding buffers | 
| B. | adding multipliers | 
| C. | partitioning | 
| D. | adding power dividers | 
| Answer» D. adding power dividers | |
| 8. | The sequential circuit operates in _____ mode/modes of operation. | 
| A. | only one | 
| B. | two | 
| C. | three | 
| D. | four | 
| Answer» C. three | |
| 9. | Storage elements used are | 
| A. | D flipflops | 
| B. | JK flipflops | 
| C. | RS flipflops | 
| D. | All of the mentioned | 
| Answer» E. | |
| 10. | Storage elements in scan design technique is reconfigured to form | 
| A. | RAM | 
| B. | shift registers | 
| C. | buffers | 
| D. | amplifiers | 
| Answer» C. buffers | |
| 11. | A sequential circuit contains combinational logic and storage elements in | 
| A. | feedback path | 
| B. | output node | 
| C. | input node | 
| D. | non feedback path | 
| Answer» B. output node | |
| 12. | The design technique helps in improving | 
| A. | controllability | 
| B. | observability | 
| C. | controllability and observability | 
| D. | overall performance | 
| Answer» D. overall performance | |
| 13. | The major difficulty in sequential circuit testing is in | 
| A. | determining output | 
| B. | determining internal state | 
| C. | determining external state | 
| D. | determining input combinations | 
| Answer» C. determining external state | |