Explore topic-wise MCQs in Vlsi.

This section includes 22 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.

1.

Noise margin of CMOS is:

A. Better than TTL and ECL
B. Less than TTL and ECL
C. Equal to TTL and ECL
D. None of the Mentioned
Answer» B. Less than TTL and ECL
Discussion
2.

Determine the Noise Margin for 5V CMOS inverter gate:

A. NMH = 1V and NML = 1V
B. NMH = 3.7V and NML = 0.2V
C. NMH = 0.9V and NML = 1V
D. NMH = 0.2V and NML = 0.5V
Answer» D. NMH = 0.2V and NML = 0.5V
Discussion
3.

Determine the Noise Margin for 5V TTL inverter gate:

A. NMH = 0.4V and NML =0.4V
B. NMH = 2.4V and NML = 0.4V
C. NMH = 2V and NML = 0.8V
D. NMH = 1.5V and NML = 0.4V
Answer» B. NMH = 2.4V and NML = 0.4V
Discussion
4.

If VIH of the 2nd gate is higher than VOH of the 1st gate, then logic output 0 from the 1st gate is considered as:

A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned
Answer» C. Logic input 0
Discussion
5.

Input Voltage between VIL and VOL is considered as:

A. Logic Input 1
B. Logic Input 0
C. Uncertain
D. None of the mentioned
Answer» C. Uncertain
Discussion
6.

If VIL of the 2nd gate is lower than VOL of the 1st gate, then logic output 0 from the 1st gate is considered as:

A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned
Answer» C. Logic input 0
Discussion
7.

If VIL of the 2nd gate is higher than VOL of the 1st gate, then logic output 0 from the 1st gate is considered as:

A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned
Answer» D. None of the mentioned
Discussion
8.

The noise immunity ____________ with noise margin.

A. Decreases
B. Increases
C. Constant
D. None of the Mentioned
Answer» C. Constant
Discussion
9.

The Higher Noise Margin is given by:

A. VOH – VIH
B. VIH – VOH
C. VIH ~ VOH(Difference between VIH and VOH, depends on which one is greater)
D. All of the mentioned
Answer» B. VIH – VOH
Discussion
10.

The VIH is found from transfer characteristic of inverter by:

A. The point where straight line at VOH ends
B. The slope of the transition at a point at which the slope is equal to -1
C. The midpoint of the transition line
D. All of the mentioned
Answer» C. The midpoint of the transition line
Discussion
11.

Noise Margin is:

A. Amount of noise the logic circuit can withstand
B. Difference between VOH and VIH
C. Difference between VIL and VOL
D. All of the Mentioned
Answer» E.
Discussion
12.

IF_VIL_OF_THE_2ND_GATE_IS_LOWER_THAN_VOL_OF_THE_1ST_GATE,_THEN_LOGIC_OUTPUT_0_FROM_THE_1ST_GATE_IS_CONSIDERED_AS_:?$

A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned
Answer» C. Logic input 0
Discussion
13.

If VIH of the 2nd gate is higher than VOH of the 1st gate, then logic output 0 from the 1st gate is considered as :$

A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned
Answer» C. Logic input 0
Discussion
14.

Input Voltage between VIL and VOL is considered as:$

A. Logic Input 1
B. Logic Input 0
C. Uncertain
D. None of the mentioned
Answer» C. Uncertain
Discussion
15.

Noise margin of CMOS is :

A. Better than TTL and ECL
B. Less than TTL and ECL
C. Equal to TTL and ECL
D. None of the Mentioned
Answer» B. Less than TTL and ECL
Discussion
16.

If VIL of the 2nd gate is higher than VOL of the 1st gate, then logic output 0 from the 1st gate is considered as ?

A. Logic input 1
B. Uncertain
C. Logic input 0
D. None of the mentioned
Answer» D. None of the mentioned
Discussion
17.

The noise immunity ____________ with noise margin

A. Decreases
B. Increases
C. Constant
D. None of the Mentioned
Answer» C. Constant
Discussion
18.

The Uncertain or transition region is between:

A. VIH and VOH
B. VIL and VOL
C. VIH and VIL
D. VOH and VOL
Answer» D. VOH and VOL
Discussion
19.

The Lower Noise Margin is given by:

A. VOL – VIL
B. VIL – VOL
C. VIL ~ VOL(Difference between VIL and VOL, depends on which one is greater)
D. All of the Mentioned
Answer» C. VIL ~ VOL(Difference between VIL and VOL, depends on which one is greater)
Discussion
20.

The relation between threshold voltage and Noise Margin is:

A. Vth = sqrt(Noise Margin)
B. Vth = NMH – NML
C. Vth = (NMH+NML)/2
D. None of the metioned
Answer» E.
Discussion
21.

The VIL is found from transfer characteristic of inverter by:

A. The point where straight line at VOH ends
B. The slope of the transition at a point at which the slope is equal to -1
C. The midpoint of the transition line
D. All of the mentioned
Answer» C. The midpoint of the transition line
Discussion
22.

Noise Margin is :

A. Amount of noise the logic circuit can withstand
B. Difference between VOH and VIH
C. Difference between VIL and VOL
D. All of the Mentioned
Answer» E.
Discussion