 
			 
			MCQOPTIONS
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				This section includes 5 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. | In direct coupled logic, the input transistor base is connected to | 
| A. | base output | 
| B. | emitter output | 
| C. | collector output | 
| D. | ground | 
| Answer» D. ground | |
| 2. | The ratio of Zp.u./Zp.d. for E-MESFET is | 
| A. | 1/10 | 
| B. | 10/1 | 
| C. | 4/1 | 
| D. | 1/4 | 
| Answer» C. 4/1 | |
| 3. | To improve packing density, gate length should be smaller. | 
| A. | true | 
| B. | false | 
| Answer» C. | |
| 4. | For E-MESFET, Vinv is set in midway between | 
| A. | Vdd and Vss | 
| B. | Vt and Vin | 
| C. | Vt and Vout | 
| D. | barrier potential and ground | 
| Answer» E. | |
| 5. | For equal margin, Vinv is set as ______ of logic voltage swing. | 
| A. | equal | 
| B. | half of | 
| C. | one third | 
| D. | twice | 
| Answer» C. one third | |