

MCQOPTIONS
This section includes 2291 Mcqs, each offering curated multiple-choice questions to sharpen your Engineering knowledge and support exam preparation. Choose a topic below to get started.
251. |
Which logic family is characterized by a multiemitter transistor on the input? |
A. | ECL |
B. | CMOS |
C. | TTL |
D. | None of the above |
Answer» D. None of the above | |
252. |
What is the defining difference between microprocessor/DSP systems and other digital systems? |
A. | The digital system follows a programmed sequence of instructions that the designer specified. |
B. | The microprocessor follows a programmed sequence of instructions that the designer specified. |
C. | The digital system is faster. |
D. | The microprocessor/DSP is faster. |
Answer» B. The microprocessor follows a programmed sequence of instructions that the designer specified. | |
253. |
The final step in the device programming sequence is ________. |
A. | compiling |
B. | downloading |
C. | simulation |
D. | synthesis |
Answer» C. simulation | |
254. |
Most look-up tables in field-programmable gate arrays (FGPAs) use ________ inputs, resulting in ________ possible outputs. |
A. | 4,16 |
B. | 8,16 |
C. | 4,12 |
D. | 6,12 |
Answer» B. 8,16 | |
255. |
The problem of the VOH(min) of a TTL IC being too low to drive a CMOS circuit and meet the CMOS requirement of VIH(min) is usually easily overcome by: |
A. | adding a fixed voltage-divider bias resistive network at the output of the TTL device |
B. | avoiding this condition and only using TTL to drive TTL |
C. | adding an external pull-down resistor to ground |
D. | adding an external pull-up resistor to |
E. | <i>V<sub>CC</sub></i> |
Answer» E. <i>V<sub>CC</sub></i> | |
256. |
A look-up table is simply a truth table with all the possible output connections listed with their desired input response. |
A. | True |
B. | False |
Answer» C. | |
257. |
Why have PLDs taken over so much of the market? |
A. | One PLD does the work of many ICs. |
B. | The PLDs are cheaper. |
C. | Less power is required. |
D. | All of the above |
Answer» E. | |
258. |
What is the advantage of using low-power Schottky (LS) over standard TTL logic? |
A. | more power dissipation |
B. | less power dissipation |
C. | cost is less |
D. | cost is more |
Answer» C. cost is less | |
259. |
Why are the maximum value of VOL and the minimum value of VOH used to determine the noise margin rather than the typical values for these parameters? |
A. | These are worst-case conditions. |
B. | These are normal conditions. |
C. | These are best-case conditions. |
D. | It doesn't matter what values are used. |
Answer» B. These are normal conditions. | |
260. |
A TTL totem-pole circuit is designed so that the output transistors: |
A. | are always on together |
B. | provide linear phase splitting |
C. | provide voltage regulation |
D. | are never on together |
Answer» E. | |
261. |
The most common TTL series ICs are: |
A. | E-MOSFET |
B. | 7400 |
C. | quad |
D. | AC00 |
Answer» C. quad | |
262. |
What does ECL stand for? |
A. | It stands for electron-coupled logic; all of the devices used within the gates are N-type transistors. |
B. | It stands for emitter-coupled logic; all of the inputs are coupled into the device through the emitters of the input transistors. |
C. | It stands for emitter-coupled logic; all of the emitters of the input transistors are connected together and each transistor functions as an emitter follower. |
D. | It stands for energy-coupled logic; the input energy is amplified by the input transistors and allows the device to deliver higher output currents. |
Answer» D. It stands for energy-coupled logic; the input energy is amplified by the input transistors and allows the device to deliver higher output currents. | |
263. |
Which of the following summarizes the important features of emitter-coupled logic (ECL)? |
A. | low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption |
B. | good noise immunity, negative logic, high-frequency capability, low power dissipation, and short propagation time |
C. | low propagation time, high-frequency response, low power consumption, and high output voltage swings |
D. | poor noise immunity, positive supply voltage operation, good low-frequency operation, and low power |
Answer» B. good noise immunity, negative logic, high-frequency capability, low power dissipation, and short propagation time | |
264. |
The high input impedance of MOSFETs: |
A. | allows faster switching |
B. | reduces input current and power dissipation |
C. | prevents dense packing |
D. | creates low-noise reactions |
Answer» C. prevents dense packing | |
265. |
Why is a pull-up resistor needed when connecting TTL logic to CMOS logic? |
A. | to increase the output LOW voltage |
B. | to decrease the output LOW voltage |
C. | to increase the output HIGH voltage |
D. | to decrease the output HIGH voltage |
Answer» D. to decrease the output HIGH voltage | |
266. |
The time needed for an output to change from the result of an input change is known as: |
A. | noise immunity |
B. | fan-out |
C. | propagation delay |
D. | rise time |
Answer» D. rise time | |
267. |
The word "interfacing" as applied to digital electronics usually means: |
A. | a conditioning circuit connected between a standard TTL NAND gate and a standard TTL OR gate |
B. | a circuit connected between the driver and load to condition a signal so that it is compatible with the load |
C. | any gate that is a TTL operational amplifier designed to condition signals between NMOS transistors |
D. | any TTL circuit that is an input buffer stage |
Answer» C. any gate that is a TTL operational amplifier designed to condition signals between NMOS transistors | |
268. |
What is unique about TTL devices such as the 74S00? |
A. | The gate transistors are silicon (S), and the gates therefore have lower values of leakage current. |
B. | The S denotes the fact that a single gate is present in the IC rather than the usual package of 2 6 gates. |
C. | The S denotes a slow version of the device, which is a consequence of its higher power rating. |
D. | The devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn on and turn off times, which translates into higher frequency operation. |
Answer» E. | |
269. |
The IEEE/ANSI notation of an internal underlined diamond denotes: |
A. | totem-pole outputs. |
B. | open-collector outputs. |
C. | quadrature amplifiers. |
D. | tristate buffers. |
Answer» C. quadrature amplifiers. | |
270. |
Refer to the figure given below. What type of device is shown and what input levels are required to turn the LED off? |
A. | The device is an open-collector AND gate and requires both inputs to be HIGH in order to turn the LED off. |
B. | The device is a Schottky AND gate and requires only one low input to turn the LED off. |
C. | The device is an open-collector AND gate and requires only one low input to turn the LED off. |
D. | The device is a Schottky open-collector AND gate and requires a low on both inputs to turn the LED off. |
Answer» B. The device is a Schottky AND gate and requires only one low input to turn the LED off. | |
271. |
Generally, the voltage measured at an unused TTL input would typically be measured between: |
A. | 1.4 to 1.8 V. |
B. | 0 to 5 V. |
C. | 0 to 1.8 V. |
D. | 0.8 to 5 V. |
Answer» B. 0 to 5 V. | |
272. |
The bipolar TTL logic family that was developed to increase switching speed by preventing transistor saturation is: |
A. | emitter-coupled logic (ECL). |
B. | current-mode logic (CML). |
C. | transistor-transistor logic (TTL). |
D. | emitter-coupled logic (ECL) and transistor-transistor logic (TTL). |
Answer» E. | |
273. |
What type of circuit is shown below and which statement best describes its operation? |
A. | It is a two-input CMOS AND gate with open drain. |
B. | It is a two-input CMOS buffer with tristate output. |
C. | It is a CMOS inverter with tristate output. |
D. | It is a hybrid TTL-CMOS inverter with FET totem-pole output. |
Answer» D. It is a hybrid TTL-CMOS inverter with FET totem-pole output. | |
274. |
The rise time (tr) is the time it takes for a pulse to rise from its ________ point up to its ________ point. The fall time (tf) is the length of time it takes to fall from the ________ to the ________ point. |
A. | 10%, 90%, 90%, 10% |
B. | 90%, 10%, 10%, 90% |
C. | 20%, 80%, 80%, 20% |
D. | 10%, 70.7%, 70.7%, 10% |
Answer» B. 90%, 10%, 10%, 90% | |
275. |
Cascade chains are closely associated with ________. |
A. | CLBs |
B. | SOP functions |
C. | logic expansion |
D. | all of the above |
Answer» E. | |
276. |
What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)? |
A. | 5 |
B. | 10 |
C. | 50 |
D. | 100 |
Answer» C. 50 | |
277. |
What must be done to interface CMOS to TTL? |
A. | A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL. |
B. | As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the CMOS is limited to two TTL gates. |
C. | A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates. |
D. | The two series cannot be interfaced without the use of special interface buffers designed for that purpose, such as the open-collector buffers. |
Answer» C. A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates. | |
278. |
What is the static charge that can be stored by your body as you walk across a carpet? |
A. | 300 volts |
B. | 3,000 volts |
C. | 30,000 volts |
D. | Over 30,000 volts |
Answer» E. | |
279. |
The simplest equation which implements the K-map shown below is: |
A. | <img src="/_files/images/digital-electronics/digital-systems/mca4_1016a1.jpeg"> |
B. | <img src="/_files/images/digital-electronics/digital-systems/mca4_1016b1.jpeg"> |
C. | <img src="/_files/images/digital-electronics/digital-systems/mca4_1016c1.jpeg"> |
D. | <img src="/_files/images/digital-electronics/digital-systems/mca4_1016d1.jpeg"> |
Answer» B. <img src="/_files/images/digital-electronics/digital-systems/mca4_1016b1.jpeg"> | |
280. |
What type of circuit is represented in the given figure, and which statement best describes its operation? |
A. | It is a tristate inverter. When the ENABLE input is HIGH, the output is effectively an open circuit it is neither LOW nor HIGH. |
B. | It is a programmable inverter. It can be programmed to function as either an active LOW or an active HIGH inverter. |
C. | It is an active LOW buffer, which can be turned on and off by the ENABLE input. |
D. | None of the above. |
Answer» B. It is a programmable inverter. It can be programmed to function as either an active LOW or an active HIGH inverter. | |
281. |
Which of the following logic families has the highest noise margin? |
A. | TTL |
B. | LS TTL |
C. | CMOS |
D. | HCMOS |
Answer» E. | |
282. |
How many 1-of-16 decoders are required for decoding a 7-bit binary number? |
A. | 5 |
B. | 6 |
C. | 7 |
D. | 8 |
Answer» E. | |
283. |
Which of the following logic expressions represents the logic diagram shown? |
A. | <img src="/_files/images/digital-electronics/digital-systems/mca4_1018a1.jpeg" align="center"> |
B. | <img src="/_files/images/digital-electronics/digital-systems/mca4_1018b1.jpeg" align="center"> |
C. | <img src="/_files/images/digital-electronics/digital-systems/mca4_1018c1.jpeg" align="center"> |
D. | <img src="/_files/images/digital-electronics/digital-systems/mca4_1018d1.jpeg" align="center"> |
Answer» E. | |
284. |
Which of the following summarizes the important features of ECL? |
A. | Low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption |
B. | Good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time |
C. | Slow propagation time, high frequency response, low power consumption, and high output voltage swings |
D. | Poor noise immunity, positive supply voltage operation, good low frequency operation, and low power |
Answer» B. Good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time | |
285. |
A 74HC147 priority encoder has ten active-LOW inputs and four active-LOW outputs. What would be the state of the four outputs if inputs 4 and 5 are LOW and all other inputs are HIGH? |
A. | <img src="/_files/images/digital-electronics/digital-fundamentals/mca6_0110a.gif"> |
B. | <img src="/_files/images/digital-electronics/digital-fundamentals/mca6_0110b.gif"> |
C. | <img src="/_files/images/digital-electronics/digital-fundamentals/mca6_0110c.gif"> |
D. | <img src="/_files/images/digital-electronics/digital-fundamentals/mca6_0110d.gif"> |
Answer» B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca6_0110b.gif"> | |
286. |
A(n) ________ consists of a programmable array of AND gates that connects to a fixed array of OR gates and is usually OTP. |
A. | GAL |
B. | CPLD |
C. | PAL |
D. | SPLD |
Answer» D. SPLD | |
287. |
When did the first PLD appear? |
A. | More than 10 years ago |
B. | More than 20 years ago |
C. | More than 30 years ago |
D. | More than 40 years ago |
Answer» D. More than 40 years ago | |
288. |
SPLDs, CPLDs, and FPGAs are all which type of device? |
A. | PAL |
B. | PLD |
C. | EPROM |
D. | SRAM |
Answer» C. EPROM | |
289. |
Which of the figures in figure (a to d) is equivalent to figure (e)? |
A. | a |
B. | b |
C. | c |
D. | d |
Answer» C. c | |
290. |
Convert BCD 0001 0111 to binary. |
A. | 10101 |
B. | 10010 |
C. | 10001 |
D. | 11000 |
Answer» D. 11000 | |
291. |
How many data select lines are required for selecting eight inputs? |
A. | 1 |
B. | 2 |
C. | 3 |
D. | 4 |
Answer» D. 4 | |
292. |
Convert BCD 0001 0010 0110 to binary. |
A. | 1111110 |
B. | 1111101 |
C. | 1111000 |
D. | 1111111 |
Answer» B. 1111101 | |
293. |
Which of the following statements accurately represents the two BEST methods of logic circuit simplification? |
A. | Boolean algebra and Karnaugh mapping |
B. | Karnaugh mapping and circuit waveform analysis |
C. | Actual circuit trial and error evaluation and waveform analysis |
D. | Boolean algebra and actual circuit trial and error evaluation |
Answer» B. Karnaugh mapping and circuit waveform analysis | |
294. |
The implementation of simplified sum-of-products expressions may be easily implemented into actual logic circuits using all universal ________ gates with little or no increase in circuit complexity. (Select the response for the blank space that will BEST make the statement true.) |
A. | AND/OR |
B. | NAND |
C. | NOR |
D. | OR/AND |
Answer» C. NOR | |
295. |
Which of the following statements apply to CMOS devices? |
A. | The devices should not be inserted into circuits with the power on. |
B. | All tools, test equipment, and metal workbenches should be tied to earth ground. |
C. | The devices should be stored and shipped in antistatic tubes or conductive foam. |
D. | All of the above. |
Answer» E. | |
296. |
What causes low-power Schottky TTL to use less power than the 74XX series TTL? |
A. | The Schottky-clamped transistor |
B. | Nothing. The 74XX series uses less power. |
C. | A larger value resistor |
D. | Using NAND gates |
Answer» D. Using NAND gates | |
297. |
What are the major differences between the 5400 and 7400 series of ICs? |
A. | The 5400 series are military grade and require tighter supply voltages and temperatures. |
B. | The 5400 series are military grade and allow for a wider range of supply voltages and temperatures. |
C. | The 7400 series are an improvement over the original 5400s. |
D. | The 7400 series was originally developed by Texas Instruments. The 5400 series was brought out by National Semiconductors after TI's patents expired, as a second supply source. |
Answer» C. The 7400 series are an improvement over the original 5400s. | |
298. |
What type of logic circuit is shown below and what logic function is being performed? > |
A. | It is an NMOS AND gate. |
B. | It is a CMOS AND gate. |
C. | It is a CMOS NOR gate. |
D. | It is a PMOS NAND gate. |
Answer» D. It is a PMOS NAND gate. | |
299. |
Which of the logic families listed below allows the highest operating frequency? |
A. | 74AS |
B. | ECL |
C. | HCMOS |
D. | 54S |
Answer» C. HCMOS | |
300. |
Refer to the given figure. What type of output arrangement is being used for the output? |
A. | Complementary-symmetry |
B. | Push-pull |
C. | Quasi push-pull |
D. | Totem-pole |
Answer» E. | |