

MCQOPTIONS
This section includes 2291 Mcqs, each offering curated multiple-choice questions to sharpen your Engineering knowledge and support exam preparation. Choose a topic below to get started.
151. |
The rise time is the time it takes a pulse to go from ________. |
A. | the base line to the maximum HIGH voltage |
B. | 10% of the pulse amplitude to the maximum HIGH voltage |
C. | the base line to 90% of the pulse amplitude |
D. | 10% of the pulse amplitude to 90% of the pulse amplitude |
Answer» E. | |
152. |
Convert the fractional decimal number 6.75 to binary. |
A. | 0111.1100 |
B. | 0110.1010 |
C. | 0110.1100 |
D. | 0110.0110 |
Answer» D. 0110.0110 | |
153. |
A pulse has a period of 15 ms. Its frequency is ________. |
A. | 6.66 Hz |
B. | 66.66 Hz |
C. | 666.66 Hz |
D. | 15 Hz |
Answer» C. 666.66 Hz | |
154. |
Digital representations of numerical values of quantities may BEST be described as having characteristics: |
A. | that are difficult to interpret because they are continuously changing. |
B. | that vary constantly over a continuous range of values. |
C. | that vary in constant and direct proportion to the values they represent. |
D. | that vary in discrete steps in proportion to the values they represent. |
Answer» E. | |
155. |
A common instrument used in troubleshooting a digital circuit is a(n) ________. |
A. | logic probe |
B. | oscilloscope |
C. | pulser |
D. | all of the above |
Answer» E. | |
156. |
In positive logic, ________. |
A. | a HIGH = 1, a LOW = 0 |
B. | a LOW = 1, a HIGH = 0 |
C. | only HIGHs are present |
D. | only LOWs are present |
Answer» B. a LOW = 1, a HIGH = 0 | |
157. |
The parallel transmission of digital data: |
A. | is much slower than the serial transmission of data. |
B. | requires only one signal line between sender and receiver. |
C. | requires as many signal lines between sender and receiver as there are data bits. |
D. | is less expensive than the serial method of data transmission. |
Answer» D. is less expensive than the serial method of data transmission. | |
158. |
Convert the fractional binary number 0000.1010 to decimal. |
A. | 0.625 |
B. | 0.50 |
C. | 0.55 |
D. | 0.10 |
Answer» B. 0.50 | |
159. |
Which of the following is not an analog device? |
A. | Thermocouple |
B. | Current flow in a circuit |
C. | Light switch |
D. | Audio microphone |
Answer» D. Audio microphone | |
160. |
Digital signals transmitted on a single conductor (and a ground) must be transmitted in: |
A. | slow speed. |
B. | parallel. |
C. | analog. |
D. | serial. |
Answer» E. | |
161. |
In a certain digital waveform, the period is four times the pulse width. The duty cycle is ________. |
A. | 0% |
B. | 25% |
C. | 50% |
D. | 100% |
Answer» C. 50% | |
162. |
A demultiplexer has ________. |
A. | one data input and a number of selection inputs, and they have several outputs |
B. | one input and one output |
C. | several inputs and several outputs |
D. | several inputs and one output |
Answer» B. one input and one output | |
163. |
A flip-flop has ________. |
A. | one stable state |
B. | no stable states |
C. | two stable states |
D. | none of the above |
Answer» D. none of the above | |
164. |
What is the decimal value of 23 ? |
A. | 2 |
B. | 4 |
C. | 6 |
D. | 8 |
Answer» E. | |
165. |
Convert the fractional binary number 0001.0010 to decimal. |
A. | 1.40 |
B. | 1.125 |
C. | 1.20 |
D. | 1.80 |
Answer» C. 1.20 | |
166. |
An encoder converts ________. |
A. | noncoded information into coded form |
B. | coded information into noncoded form |
C. | HIGHs to LOWs |
D. | LOWs to HIGHs |
Answer» B. coded information into noncoded form | |
167. |
Convert the fractional binary number 10010.0100 to decimal. |
A. | 24.50 |
B. | 18.25 |
C. | 18.40 |
D. | 16.25 |
Answer» C. 18.40 | |
168. |
A full subtracter circuit requires ________. |
A. | two inputs and two outputs |
B. | two inputs and three outputs |
C. | three inputs and one output |
D. | three inputs and two outputs |
Answer» E. | |
169. |
What has happened to the advances in digital technologies over the past three decades? |
A. | Slowed down considerably |
B. | Continued to increase, but at a decreasing rate |
C. | Made excellent progress |
D. | Nothing short of phenomenal |
Answer» E. | |
170. |
A type of digital circuit technology that uses bipolar junction transistors is ________. |
A. | TTL |
B. | CMOS |
C. | LSI |
D. | NMOS |
Answer» B. CMOS | |
171. |
Which format can send several bits of information faster? |
A. | Parallel |
B. | Serial |
C. | Both are the same |
D. | Cannot tell |
Answer» B. Serial | |
172. |
A classification of ICs with complexities of 12 to 100 equivalent gates on a chip is known as ________. |
A. | SSI |
B. | MSI |
C. | LSI |
D. | VLSI |
Answer» C. LSI | |
173. |
The output of an AND gate is LOW ________. |
A. | all the time |
B. | when any input is LOW |
C. | when any input is HIGH |
D. | when all inputs are HIGH |
Answer» C. when any input is HIGH | |
174. |
Which of the following statements does NOT describe an advantage of digital technology? |
A. | The values may vary over a continuous range. |
B. | The circuits are less affected by noise. |
C. | The operation can be programmed. |
D. | Information storage is easy. |
Answer» B. The circuits are less affected by noise. | |
175. |
The generic array logic (GAL) device is ________. |
A. | one-time programmable |
B. | reprogrammable |
C. | a CMOS device |
D. | reprogrammable and a CMOS device |
Answer» C. a CMOS device | |
176. |
In the decimal numbering system, what is the MSD? |
A. | The middle digit of a stream of numbers |
B. | The digit to the right of the decimal point |
C. | The last digit on the right |
D. | The digit with the most weight |
Answer» E. | |
177. |
The range of voltages between VL(max) and VH(min) are ________. |
A. | unknown |
B. | unnecessary |
C. | unacceptable |
D. | between 2 V and 5 V |
Answer» D. between 2 V and 5 V | |
178. |
Implementing the expression AB + CDE using NAND logic, we get: |
A. | (A) |
B. | (B) |
C. | (C) |
D. | (D) |
Answer» B. (B) | |
179. |
The Boolean SOP expression obtained from the truth table below is ________. |
A. | <img src="/_files/images/digital-electronics/digital-fundamentals/mca5_0090a.gif"> |
B. | <img src="/_files/images/digital-electronics/digital-fundamentals/mca5_0090b.gif"> |
C. | <img src="/_files/images/digital-electronics/digital-fundamentals/mca5_0090c.gif"> |
D. | None of these |
Answer» D. None of these | |
180. |
The 8-input XOR circuit shown has an output of Y = 1. Which input combination below (ordered A H) is correct?
|
A. | 10111100 |
B. | 10111000 |
C. | 11100111 |
D. | 00011101 |
Answer» B. 10111000 | |
181. |
Can a 74HCMOS logic gate directly connect to a 74ALSTTL gate? |
A. | Yes |
B. | No |
Answer» B. No | |
182. |
What is the major advantage of ECL logic? |
A. | very high speed |
B. | wide range of operating voltage |
C. | very low cost |
D. | very high power |
Answer» B. wide range of operating voltage | |
183. |
As a general rule, the lower the value of the speed power product, the better the device because of its: |
A. | long propagation delay and high power consumption |
B. | long propagation delay and low power consumption |
Answer» C. | |
184. |
What is the range of invalid TTL output voltage? |
A. | 0.0 0.4 V |
B. | 0.4 2.4 V |
C. | 2.4 5.0 V |
D. | 0.0 5.0 V |
Answer» C. 2.4 5.0 V | |
185. |
Assume that a particular IC has a supply voltage (Vcc) equal to +5 V and ICCH = 10 mA and ICCL = 23 mA. What is the power dissipation for the chip? |
A. | 50 mW |
B. | 82.5 mW |
C. | 115 mW |
D. | 165 mW |
Answer» C. 115 mW | |
186. |
An open collector output can ________ current, but it cannot ________. |
A. | sink, source current |
B. | source, sink current |
C. | sink, source voltage |
D. | source, sink voltage |
Answer» B. source, sink current | |
187. |
What is the difference between the 54XX and 74XX series of TTL logic gates? |
A. | 54XX is faster. |
B. | 54XX is slower. |
C. | 54XX has a wider power supply and expanded temperature range. |
D. | 54XX has a narrower power supply and contracted temperature range. |
Answer» D. 54XX has a narrower power supply and contracted temperature range. | |
188. |
Why is a decoupling capacitor needed for TTL ICs and where should it be connected? |
A. | to block dc, connect to input pins |
B. | to reduce noise, connect to input pins |
C. | to reduce the effects of noise, connect between power supply and ground |
Answer» D. | |
189. |
Why is the fan-out of CMOS gates frequency dependent? |
A. | Each CMOS input gate has a specific propagation time and this limits the number of different gates that can be connected to the output of a CMOS gate. |
B. | When the frequency reaches the critical value, the gate will only be capable of delivering 70% of the normal output voltage and consequently the output power will be one-half of normal; this defines the upper operating frequency. |
C. | The higher the number of gates attached to the output, the more frequently they will have to be serviced, thus reducing the frequency at which each will be serviced with an input signal. |
D. | The input gates of the FETs are predominantly capacitive, and as the signal frequency increases the capacitive loading also increases, thereby limiting the number of loads that may be attached to the output of the driving gate. |
Answer» E. | |
190. |
Which of the following logic families has the highest maximum clock frequency? |
A. | S-TTL |
B. | AS-TTL |
C. | HS-TTL |
D. | HCMOS |
Answer» C. HS-TTL | |
191. |
Logic circuits that are designated as buffers, drivers, or buffer/drivers are designed to have: |
A. | a greater current/voltage capability than an ordinary logic circuit. |
B. | greater input current/voltage capability than an ordinary logic circuit. |
C. | a smaller output current/voltage capability than an ordinary logic. |
D. | greater input and output current/voltage capability than an ordinary logic circuit. |
Answer» B. greater input current/voltage capability than an ordinary logic circuit. | |
192. |
Which of the following will not normally be found on a data sheet? |
A. | Minimum HIGH level output voltage |
B. | Maximum LOW level output voltage |
C. | Minimum LOW level output voltage |
D. | Maximum HIGH level input current |
Answer» D. Maximum HIGH level input current | |
193. |
Which of the following is a form of DeMorgan's theorem? |
A. | <img src="/_files/images/digital-electronics/digital-systems/mca3_1017a1.gif"> |
B. | <img src="/_files/images/digital-electronics/digital-systems/mca3_1017b1.gif"> |
C. | <img src="/_files/images/digital-electronics/digital-systems/mca3_1017c1.gif"> |
D. | <img src="/_files/images/digital-electronics/digital-systems/mca3_1017d1.gif"> |
Answer» D. <img src="/_files/images/digital-electronics/digital-systems/mca3_1017d1.gif"> | |
194. |
How are the statements between BEGIN and END not evaluated in VHDL? |
A. | Constantly |
B. | Simultaneously |
C. | Concurrently |
D. | Sequentially |
Answer» E. | |
195. |
Which logic gate does this truth table describe? |
A. | AND |
B. | OR |
C. | NAND |
D. | NOR |
Answer» E. | |
196. |
For a 3-input NAND gate, with the input waveforms as shown below, which output waveform is correct? |
A. | a |
B. | b |
C. | c |
D. | d |
Answer» D. d | |
197. |
Which of the figures (a to d) is the DeMorgan equivalent of Figure (e)? |
A. | a |
B. | b |
C. | c |
D. | d |
Answer» B. b | |
198. |
In VHDL, the mode of a port does not define: |
A. | an input. |
B. | an output. |
C. | both an input and an output. |
D. | the TYPE of the bit. |
Answer» E. | |
199. |
Which of the following equations would accurately describe a 4-input OR gate when A = 1, B = 1, C = 0, and D = 0? |
A. | 1 + 1 + 0 + 0 = 1 |
B. | 1 + 1 + 0 + 0 = 01 |
C. | 1 + 1 + 0 + 0 = 0 |
D. | 1 + 1 + 0 + 0 = 00 |
Answer» B. 1 + 1 + 0 + 0 = 01 | |
200. |
Which of the following logic families has the shortest propagation delay? |
A. | CMOS |
B. | BiCMOS |
C. | ECL |
D. | 74SXX |
Answer» D. 74SXX | |