Explore topic-wise MCQs in Engineering.

This section includes 2291 Mcqs, each offering curated multiple-choice questions to sharpen your Engineering knowledge and support exam preparation. Choose a topic below to get started.

1.

How many gates would be required to implement the following Boolean expression after simplification? XY + X(X + Z) + Y(X + Z)

A. 1
B. 2
C. 4
D. 5
Answer» C. 4
2.

What is the primary motivation for using Boolean algebra to simplify logic expressions?

A. It may make it easier to understand the overall function of the circuit.
B. It may reduce the number of gates.
C. It may reduce the number of inputs required.
D. all of the above
Answer» E.
3.

An AND gate with schematic "bubbles" on its inputs performs the same function as a(n)________ gate.

A. NOT
B. OR
C. NOR
D. NAND
Answer» D. NAND
4.

Applying DeMorgan's theorem to the expression , we get ________.

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0060a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0060b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0060c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0060d.gif">
Answer» E.
5.

Applying DeMorgan's theorem to the expression , we get ________.

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0050a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0050b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0050c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0050d.gif">
Answer» B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0050b.gif">
6.

Which of the following is an important feature of the sum-of-products (SOP) form of expression?

A. All logic circuits are reduced to nothing more than simple AND and OR gates.
B. The delay times are greatly reduced over other forms.
C. No signal must pass through more than two gates, not including inverters.
D. The maximum number of gates that any signal must pass through is reduced by a factor of two.
Answer» D. The maximum number of gates that any signal must pass through is reduced by a factor of two.
7.

Mapping the SOP expression , we get ________.

A. (A)
B. (B)
C. (C)
D. (D)
Answer» C. (C)
8.

Derive the Boolean expression for the logic circuit shown below:

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0080a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0080b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0080c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0080d.gif">
Answer» D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0080d.gif">
9.

Which is the correct logic function for this PAL diagram?

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_00250a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_00250b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_00250c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_00250d.gif">
Answer» D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_00250d.gif">
10.

For the SOP expression , how many 0s are in the truth table's output column?

A. zero
B. 1
C. 4
D. 5
Answer» D. 5
11.

Mapping the standard SOP expression , we get

A. (A)
B. (B)
C. (C)
D. (D)
Answer» C. (C)
12.

The Boolean expression is logically equivalent to what single gate?

A. NAND
B. NOR
C. AND
D. OR
Answer» B. NOR
13.

Applying the distributive law to the expression , we get ________.

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0030a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0030b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0030c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0030d.gif">
Answer» E.
14.

AC + ABC = AC

A. True
B. False
Answer» B. False
15.

A Karnaugh map is a systematic way of reducing which type of expression?

A. product-of-sums
B. exclusive NOR
C. sum-of-products
D. those with overbars
Answer» D. those with overbars
16.

How many gates would be required to implement the following Boolean expression before simplification? XY + X(X + Z) + Y(X + Z)

A. 1
B. 2
C. 4
D. 5
Answer» E.
17.

Which Boolean algebra property allows us to group operands in an expression in any order without affecting the results of the operation [for example, A + B = B + A]?

A. associative
B. commutative
C. Boolean
D. distributive
Answer» C. Boolean
18.

For the SOP expression , how many 1s are in the truth table's output column?

A. 1
B. 2
C. 3
D. 5
Answer» D. 5
19.

Applying DeMorgan's theorem to the expression , we get ________.

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0040a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0040b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0040c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0040d.gif">
Answer» B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0040b.gif">
20.

A truth table for the SOP expression has how many input combinations?

A. 1
B. 2
C. 4
D. 8
Answer» E.
21.

Determine the values of A, B, C, and D that make the product term equal to 1.

A. A = 0, B = 1, C = 0, D = 1
B. A = 0, B = 0, C = 0, D = 1
C. A = 1, B = 1, C = 1, D = 1
D. A = 0, B = 0, C = 1, D = 0
Answer» B. A = 0, B = 0, C = 0, D = 1
22.

The systematic reduction of logic circuits is accomplished by:

A. using Boolean algebra
B. symbolic reduction
C. TTL logic
D. using a truth table
Answer» B. symbolic reduction
23.

Which output expression might indicate a product-of-sums circuit construction?

A. <img src="/_files/images/digital-electronics/basic-digital-electronics/mca5_1023a1.gif">
B. <img src="/_files/images/digital-electronics/basic-digital-electronics/mca5_1023b1.gif">
C. <img src="/_files/images/digital-electronics/basic-digital-electronics/mca5_1023c1.gif">
D. <img src="/_files/images/digital-electronics/basic-digital-electronics/mca5_1023d1.gif">
Answer» E.
24.

Occasionally, a particular logic expression will be of no consequence in the operation of a circuit, such as a BCD-to-decimal converter. These result in ________terms in the K-map and can be treated as either ________ or ________, in order to ________ the resulting term.

A. don't care, 1s, 0s, simplify
B. spurious, ANDs, ORs, eliminate
C. duplicate, 1s, 0s, verify
D. spurious, 1s, 0s, simplify
Answer» B. spurious, ANDs, ORs, eliminate
25.

The NAND or NOR gates are referred to as "universal" gates because either:

A. can be found in almost all digital circuits
B. can be used to build all the other types of gates
C. are used in all countries of the world
D. were the first gates to be integrated
Answer» C. are used in all countries of the world
26.

Converting the Boolean expression LM + M(NO + PQ) to SOP form, we get ________.

A. LM + MNOPQ
B. L + MNO + MPQ
C. LM + M + NO + MPQ
D. LM + MNO + MPQ
Answer» E.
27.

One of De Morgan's theorems states that . Simply stated, this means that logically there is no difference between:

A. a NOR and an AND gate with inverted inputs
B. a NAND and an OR gate with inverted inputs
C. an AND and a NOR gate with inverted inputs
D. a NOR and a NAND gate with inverted inputs
Answer» B. a NAND and an OR gate with inverted inputs
28.

Applying DeMorgan's theorem to the expression , we get ________

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0070a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0070b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0070c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0070d.gif">
Answer» B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0070b.gif">
29.

The output of an AND gate with three inputs, A, B, and C, is HIGH when ________.

A. A = 1, B = 1, C = 0
B. A = 0, B = 0, C = 0
C. A = 1, B = 1, C = 1
D. A = 1, B = 0, C = 1
Answer» D. A = 1, B = 0, C = 1
30.

Convert the following SOP expression to an equivalent POS expression.

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0160a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0160b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0160c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0160d.gif">
Answer» C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0160c.gif">
31.

Determine the values of A, B, C, and D that make the sum term equal to zero.

A. A = 1, B = 0, C = 0, D = 0
B. A = 1, B = 0, C = 1, D = 0
C. A = 0, B = 1, C = 0, D = 0
D. A = 1, B = 0, C = 1, D = 1
Answer» C. A = 0, B = 1, C = 0, D = 0
32.

Derive the Boolean expression for the logic circuit shown below:

A. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0090a.gif">
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0090b.gif">
C. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0090c.gif">
D. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0090d.gif">
Answer» B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca4_0090b.gif">
33.

What is the difference between a 7400 and a 7411 IC?

A. 7400 has two four-input NAND gates; 7411 has three three-input AND gates
B. 7400 has four two-input NAND gates; 7411 has three three-input AND gates
C. 7400 has two four-input AND gates; 7411 has three three-input NAND gates
D. 7400 has four two-input AND gates; 7411 has three three-input NAND gates
Answer» C. 7400 has two four-input AND gates; 7411 has three three-input NAND gates
34.

If the output of a three-input AND gate must be a logic LOW, what must the condition of the inputs be?

A. All inputs must be LOW.
B. All inputs must be HIGH.
C. At least one input must be LOW.
D. At least one input must be HIGH.
Answer» D. At least one input must be HIGH.
35.

What are the pin numbers of the outputs of the gates in a 7432 IC?

A. 3, 6, 10, and 13
B. 1, 4, 10, and 13
C. 3, 6, 8, and 11
D. 1, 4, 8, and 11
Answer» D. 1, 4, 8, and 11
36.

If the input to a NOT gate is A and the output is X, then ________.

A. X = A
B. <img src="/_files/images/digital-electronics/digital-fundamentals/mca3_0040b.gif">
C. X = 0
D. none of the above
Answer» C. X = 0
37.

If a 3-input AND gate has eight input possibilities, how many of those possibilities will result in a HIGH output?

A. 1
B. 2
C. 7
D. 8
Answer» B. 2
38.

The Boolean expression for a 3-input AND gate is ________.

A. X = AB
B. X = ABC
C. X = A + B + C
D. X = AB + C
Answer» C. X = A + B + C
39.

What does the small bubble on the output of the NAND gate logic symbol mean?

A. open collector output
B. tristate
C. The output is inverted.
D. none of the above
Answer» D. none of the above
40.

The output of an exclusive-OR gate is HIGH if ________.

A. all inputs are LOW
B. all inputs are HIGH
C. the inputs are unequal
D. none of the above
Answer» D. none of the above
41.

A CMOS IC operating from a 3-volt supply will consume ________.

A. less power than a TTL IC
B. more power than a TTL IC
C. the same power as a TTL IC
D. no power at all
Answer» B. more power than a TTL IC
42.

TTL operates from a ________.

A. 9-volt supply
B. 3-volt supply
C. 12-volt supply
D. 5-volt supply
Answer» E.
43.

The power dissipation, PD, of a logic gate is the product of the ________.

A. dc supply voltage and the peak current
B. dc supply voltage and the average supply current
C. ac supply voltage and the peak current
D. ac supply voltage and the average supply current
Answer» C. ac supply voltage and the peak current
44.

Which of the following choices meets the minimum requirement needed to create specialized waveforms that are used in digital control and sequencing circuits?

A. basic gates, a clock oscillator, and a repetitive waveform generator
B. basic gates, a clock oscillator, and a Johnson shift counter
C. basic gates, a clock oscillator, and a DeMorgan pulse generator
D. basic gates, a clock oscillator, a repetitive waveform generator, and a Johnson shift counter
Answer» B. basic gates, a clock oscillator, and a Johnson shift counter
45.

The expression W(X + YZ) can be converted to SOP form by applying which law?

A. associative law
B. commutative law
C. distributive law
D. none of the above
Answer» D. none of the above
46.

The output of a NOR gate is HIGH if ________.

A. all inputs are HIGH
B. any input is HIGH
C. any input is LOW
D. all inputs are LOW
Answer» E.
47.

The switching speed of CMOS is now ________.

A. competitive with TTL
B. three times that of TTL
C. slower than TTL
D. twice that of TTL
Answer» B. three times that of TTL
48.

How many pins does the 4049 IC have?

A. 14
B. 16
C. 18
D. 20
Answer» C. 18
49.

The commutative law of addition and multiplication indicates that:

A. we can group variables in an AND or in an OR any way we want
B. an expression can be expanded by multiplying term by term just the same as in ordinary algebra
C. the way we OR or AND two variables is unimportant because the result is the same
D. the factoring of Boolean expressions requires the multiplication of product terms that contain like variables
Answer» D. the factoring of Boolean expressions requires the multiplication of product terms that contain like variables
50.

The output of an OR gate with three inputs, A, B, and C, is LOW when ________.

A. A = 0, B = 0, C = 0
B. A = 0, B = 0, C = 1
C. A = 0, B = 1, C = 1
D. all of the above
Answer» B. A = 0, B = 0, C = 1