MCQOPTIONS
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MCQOPTIONS
This section includes 2171 Mcqs, each offering curated multiple-choice questions to sharpen your ENGINEERING SERVICES EXAMINATION (ESE) knowledge and support exam preparation. Choose a topic below to get started.
| 1651. |
The encapsulation of transistor is necessary for |
| A. | preventing radio interference |
| B. | preventing photo-emission effects |
| C. | avoiding loss of free electrons |
| D. | mechanical ruggedness |
| Answer» E. | |
| 1652. |
Assertion (A): In a common source amplifier with source terminal at ac ground the voltage gain is about gm rdReason (R): A common source amplifier is a source follower circuit |
| A. | Both A and R are correct and R is correct explanation for A |
| B. | Both A and R are correct but R is not correct explanation for A |
| C. | A is correct R is wrong |
| D. | A is wrong R is correct |
| Answer» D. A is wrong R is correct | |
| 1653. |
Assertion (A): In a differential amplifier the current through common emitter resistor is called tail currentReason (R): CMRR of an op-amp indicates how a differential signal amplified |
| A. | Both A and R are correct and R is correct explanation for A |
| B. | Both A and R are correct but R is not correct explanation for A |
| C. | A is correct R is wrong |
| D. | A is wrong R is correct |
| Answer» D. A is wrong R is correct | |
| 1654. |
In an amplifier the stray capacitances assume impedance at low frequencies |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | can't say |
| Answer» C. May be True or False | |
| 1655. |
In the case of an amplifier, the normalised voltage gain is given by following equation.where f0 is zero frequency, fP is pole frequency. For a standard frequency response of the amplifier, |
| A. | fP >> f0 |
| B. | fP = f0 |
| C. | fP << f0 |
| D. | f0 = 2 fP |
| Answer» B. fP = f0 | |
| 1656. |
Which of the following components is essential for a voltage multiplier circuit? |
| A. | Resistor |
| B. | Inductor |
| C. | Capacitor |
| D. | Both (a) and (c) |
| Answer» D. Both (a) and (c) | |
| 1657. |
An R-C coupled amplifier has mid-frequency gain of 200 and a frequency response from 100 Hz to 20 kHz. A negative feedback network with β = 0.2 is incorporated into the amplifier circuit, the Bandwidth will be |
| A. | 50 kHz |
| B. | 20 kHz |
| C. | 100 kHz |
| D. | infinite |
| Answer» D. infinite | |
| 1658. |
For full wave rectification four diode bridge rectifier is claimed to have following advantages: 1. Less expensive transformer2. Small size transformer3. Suitable for higher voltage applications Which of these are correct? |
| A. | 1 and 2 only |
| B. | 1 and 3 only |
| C. | 2 and 2 only |
| D. | 1, 2, 3 |
| Answer» E. | |
| 1659. |
Assertion (A): In monolithic IC the components are part of one chipReason (R): An op-amp is a high gain dc amplifier |
| A. | Both A and R are correct and R is correct explanation for A |
| B. | Both A and R are correct but R is not correct explanation for A |
| C. | A is correct R is wrong |
| D. | A is wrong R is correct |
| Answer» C. A is correct R is wrong | |
| 1660. |
The absolute values of pinch-off voltage and gate-source cut-off voltage are |
| A. | nearly zero |
| B. | complementary to each other |
| C. | never equal |
| D. | equal |
| Answer» E. | |
| 1661. |
The current through R1 is(If β = 99, VBE = 0.74 V) |
| A. | 0.1 mA |
| B. | 0.35 mA |
| C. | 0.2 mA |
| D. | none |
| Answer» B. 0.35 mA | |
| 1662. |
In calculating input impedance, the load impedance is considered to be connected at the output. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | can't say |
| Answer» B. False | |
| 1663. |
In the amplifier circuit figure the quiescent point voltage and current are |
| A. | 12 V, 5 mA |
| B. | 12 V, 2 mA |
| C. | 10 V, 2 mA |
| D. | 10 V, 5 mA |
| Answer» D. 10 V, 5 mA | |
| 1664. |
In an RC phase shift oscillator, the total phase shift of the three RC lead networks is |
| A. | 360° |
| B. | 180° |
| C. | 90° |
| D. | 0° |
| Answer» C. 90° | |
| 1665. |
If Vin is 0.99 V, what is the digital output of the ADC 0801 after INTER goes low? |
| A. | 0011 0011 |
| B. | 0101 1111 |
| C. | 0111 1100 |
| D. | 1111 1111 |
| Answer» B. 0101 1111 | |
| 1666. |
What is the direction of control bus? |
| A. | Unidirection into μp |
| B. | Unidirection out of up |
| C. | Bidirectional |
| D. | Mixed direction i.e., some lines into μp and some other out of μp |
| Answer» E. | |
| 1667. |
The Boolean expression (A̅ + B) (A + C̅) (B̅ + C̅) simplifies to |
| A. | (A + B) C̅ |
| B. | (A + B̅) C̅ |
| C. | (A̅ + B) C̅ |
| D. | none of these |
| Answer» D. none of these | |
| 1668. |
The rate of change of digital signals between High and Low level is |
| A. | very fast |
| B. | fast |
| C. | slow |
| D. | very slow |
| Answer» B. fast | |
| 1669. |
For the logic circuit of the given figure, the minimized expression is |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» B. B | |
| 1670. |
In 8085 microprocessor, what are the contents of register SP, after the interrupt has been started? |
| A. | 0210 H |
| B. | 0211 H |
| C. | 054 CH |
| D. | 054 EH |
| Answer» D. 054 EH | |
| 1671. |
The inputs to a NAND gate are as shown in the given figure. The waveform of output is |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» B. B | |
| 1672. |
In the given figure A = 1, B = 1. B is now changed to a sequence 101010................The outputs X and Y will be |
| A. | fixed at 0 and 1 respectively |
| B. | X = 1010.......and Y = 0101........ |
| C. | X = 1010..........and Y = 1010 |
| D. | fixed at 1 and 0 respectively |
| Answer» B. X = 1010.......and Y = 0101........ | |
| 1673. |
To have the multiprocessing capabilities of the 8086 microprocessor, the pin connected to the ground is |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» E. | |
| 1674. |
In the given figure RC = RL = 1 kΩ, then V0 = |
| A. | 5 V |
| B. | 2.5 V |
| C. | 1 V |
| D. | 0 V |
| Answer» C. 1 V | |
| 1675. |
For the NMOS gate in the given figure, F = |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» D. D | |
| 1676. |
Inputs A and B of the given figure are applied to a NAND gate. The output is LOW |
| A. | from 0 to 6 |
| B. | from 0 to 2 |
| C. | from 0 to 1 and 2 to 3 |
| D. | from 1 to 2 and 3 to 4 |
| Answer» D. from 1 to 2 and 3 to 4 | |
| 1677. |
The logic circuit of the given figure is equivalent to |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» D. D | |
| 1678. |
In the figure, the LED |
| A. | emits light when both S1 and S2 are closed |
| B. | emits light when both S1 and S2 are open |
| C. | emits light when only S1 and S2 is closed |
| D. | does not Emit light, irrespective of the switched positions |
| Answer» E. | |
| 1679. |
Four inputs A, B, C, D are fed to a NOR gate. The output of NOR gate is fed to an inverter. The output of inverter is |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» B. B | |
| 1680. |
The counter shown in the given figure is built using 4 -ve edge triggered toggle FFs. The FF can be set asynchronously when R = 0. The combinational logic required to realize a modulo-13 counter is |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» B. B | |
| 1681. |
The Boolean expression for the shaded area in the Venn diagram is |
| A. | X̅ + Y̅ + Z |
| B. | XY̅ + Z + X̅ YZ |
| C. | X̅ Y̅ Z + XY |
| D. | X + Y + Z |
| Answer» D. X + Y + Z | |
| 1682. |
The logic realized by the circuit shown in figure below is |
| A. | F = A - C |
| B. | F = A + C |
| C. | F = B ⊙ C |
| D. | F = B ⊕ C |
| Answer» E. | |
| 1683. |
The inputs A and B of the given figure are applied to a two input NOR gate. The output waveform is |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» C. C | |
| 1684. |
In the circuit of the given figure, V₀ = |
| A. | 5 V |
| B. | 3.1 V |
| C. | 2.5 V |
| D. | 0 |
| Answer» B. 3.1 V | |
| 1685. |
In following figure, the initial contents of the 4-bit serial in parallel out, right shift, shift register as shown in figure are 0110. After 3 clock pulses the contents of the shift register will be |
| A. | 0000 |
| B. | 0101 |
| C. | 1010 |
| D. | 1110 |
| Answer» D. 1110 | |
| 1686. |
figure shows a NAND latch used as a switch debouncer. With the switch in STOP position. Q will be equal to |
| A. | 0 |
| B. | 1 |
| C. | CLK |
| D. | none of these |
| Answer» B. 1 | |
| 1687. |
A decoder can be used as a demultiplexer. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» B. False | |
| 1688. |
In the given figure shows a logic circuit. The minimum Boolean expression for this circuit is |
| A. | A + B |
| B. | A + B + C |
| C. | AB + C |
| D. | AB + AC + BC |
| Answer» C. AB + C | |
| 1689. |
While __________ is the fastest unsaturated logic gate __________ has the excellent noise immunity? |
| A. | ECL, TTL |
| B. | TTL, ECL |
| C. | ECL, RTL |
| D. | RTL, DTL |
| Answer» D. RTL, DTL | |
| 1690. |
Assertion (A): The resolution of a DAC depends on the number of bits.Reason (R): Low resolution leads to fine control. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 1691. |
7483 is a TTL binary adder. It can add |
| A. | two 4-bit binary numbers |
| B. | four 6-bit binary numbers |
| C. | four 8-bit binary numbers |
| D. | any number of 4-bit numbers |
| Answer» B. four 6-bit binary numbers | |
| 1692. |
The abbreviation DTL stands for |
| A. | Digital Timing Logic |
| B. | Diode Transistor Logic |
| C. | Dynamic Transient Logic |
| D. | Delayed Tracking Logic |
| Answer» C. Dynamic Transient Logic | |
| 1693. |
In the full adder, denoting Sum by S and carry by C |
| A. | S = 1 when two or more inputs are unity |
| B. | C = 1 when two or more inputs are unity |
| C. | C = 1 when all the inputs are unity |
| D. | S = 1 when all the inputs are unity |
| Answer» C. C = 1 when all the inputs are unity | |
| 1694. |
Which is correct with respect to computer memory? |
| A. | Only a particular address can have a particular memory |
| B. | Any address can have any memory |
| C. | To read a word from computer memory, it is not necessary to specify a location |
| D. | None of the above |
| Answer» C. To read a word from computer memory, it is not necessary to specify a location | |
| 1695. |
The frequency of the driving network connected between pins 1 and 2 of a 8085 chip must be |
| A. | equal to the desired clock frequency |
| B. | twice the desired clock frequency |
| C. | four times the desired clock frequency |
| D. | eight times the desired clock frequency |
| Answer» C. four times the desired clock frequency | |
| 1696. |
In a sequential circuit the output at any instant depends on |
| A. | present inputs only |
| B. | past inputs only |
| C. | past outputs only |
| D. | past output and present input |
| Answer» E. | |
| 1697. |
A device which converts BCD to seven segment is called |
| A. | encoder |
| B. | decoder |
| C. | multiplexer |
| D. | none of these |
| Answer» C. multiplexer | |
| 1698. |
As access time is decreased, the cost of memory |
| A. | remains the same |
| B. | increases |
| C. | decreases |
| D. | may increase or decrease |
| Answer» C. decreases | |
| 1699. |
A 16:1 multiplexer has 4 select input lines. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» B. False | |
| 1700. |
In an R-S latch, race condition occurs when |
| A. | R is low and S is high |
| B. | R and S are high |
| C. | R and S are low |
| D. | R is high and S is low |
| Answer» C. R and S are low | |