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MCQOPTIONS
This section includes 2171 Mcqs, each offering curated multiple-choice questions to sharpen your ENGINEERING SERVICES EXAMINATION (ESE) knowledge and support exam preparation. Choose a topic below to get started.
| 751. |
The access time of a word in 4 MB main memory is 100 ms. The access time of a word in a 32 kb data cache memory is 10 ns. The average data cache bit ratio is 0.95. The efficiency of memory access time is |
| A. | 9.5 ns |
| B. | 14.5 ns |
| C. | 20 ns |
| D. | 95 ns |
| Answer» C. 20 ns | |
| 752. |
The Boolean expression A ⊕ B is equivalent to |
| A. | AB + A̅B̅ |
| B. | A̅B + AB̅ |
| C. | B |
| D. | A̅ |
| Answer» C. B | |
| 753. |
For a binary half subtractor having two inputs A and B the correct sets of logical expressions for the outputs D (A - B) and X = Borrow are |
| A. | D = AB + A̅B, X = A̅B |
| B. | D = A̅B AB̅, X = AB̅ |
| C. | D = A̅B + AB̅, X = A̅B |
| D. | D = AB + A̅ B̅, X = AB̅ |
| Answer» D. D = AB + A̅ B̅, X = AB̅ | |
| 754. |
An 8156 has A₁₅ connected to its CE input. A₁₄ to A₈ are unconnected, and AD₇ to AC₀ are connected ignoring shadows, what are the RAM locations? |
| A. | (4000)H - (40FF)H |
| B. | (8000)H - (80FF)H |
| C. | (8000)H - (40FF)H |
| D. | Any of the above |
| Answer» C. (8000)H - (40FF)H | |
| 755. |
Which of the following is error correcting code? |
| A. | EBCDIC |
| B. | Gray |
| C. | Hamming |
| D. | ASCII |
| Answer» D. ASCII | |
| 756. |
A full adder adds |
| A. | 2 bits |
| B. | 3 bits |
| C. | 4 bits |
| D. | any number of bits |
| Answer» C. 4 bits | |
| 757. |
In an R-S latch, to set the output to high |
| A. | R is low and S is high |
| B. | R and S are high |
| C. | R and S are low |
| D. | R is high and S is low |
| Answer» B. R and S are high | |
| 758. |
The 8086 arithmetic instruction work on 1. signed and unsigned numbers2. ASCII data3. unpacked BCD data Select the correct answer using the codes given below : |
| A. | 1 and 2 |
| B. | 1 and 3 |
| C. | 2 and 3 |
| D. | 1, 2 and 3 |
| Answer» D. 1, 2 and 3 | |
| 759. |
Boolean expression for the output of XNOR (Equivalent) logic gate with inputs A and B is |
| A. | AB̅ + A̅B |
| B. | (A̅B̅) + AB |
| C. | (A̅ + B). (A + B̅) |
| D. | (A̅ + B̅). (A + B) |
| Answer» D. (A̅ + B̅). (A + B) | |
| 760. |
For a Mod-64 synchronous counter the number of flip flops and AND gates needed is |
| A. | 6 and 4 respectively |
| B. | 4 and 6 respectively |
| C. | 7 and 5 respectively |
| D. | 5 and 7 respectively |
| Answer» B. 4 and 6 respectively | |
| 761. |
In 8085 microprocessor, what is the memory word size? |
| A. | 6 bits |
| B. | 8 bits |
| C. | 12 bits |
| D. | 16 bits |
| Answer» B. 8 bits | |
| 762. |
A 10 MHz square wave clocks 5 bit ripple counter. The frequency of the 3rd FF output is |
| A. | 2 MHz |
| B. | 1.25 MHz |
| C. | 50 MHz |
| D. | 615 kHz |
| Answer» C. 50 MHz | |
| 763. |
A ripple counter has 4 bits and uses flip flops with propagation delay time of 25 ns. The maximum possible time for change of state will be |
| A. | 25 ns |
| B. | 50 ns |
| C. | 75 ns |
| D. | 100 ns |
| Answer» E. | |
| 764. |
A 4 bit counter with four flip-flops will count upto decimal |
| A. | 8 |
| B. | 15 |
| C. | 31 |
| D. | 63 |
| Answer» C. 31 | |
| 765. |
The number of inputs and outputs in a full adder are |
| A. | 2 and 1 |
| B. | 2 and 2 |
| C. | 3 and 3 |
| D. | 3 and 2 |
| Answer» E. | |
| 766. |
In which one of the following types of analog to digital convertors the conversion time is practically independent of the amplitude of the analog signal? |
| A. | The dual slope integrating type |
| B. | Successive approximation type |
| C. | Counter ramp type |
| D. | Tracking type |
| Answer» C. Counter ramp type | |
| 767. |
The logic realized by the circuit shown in figure |
| A. | F = A ⊙ C |
| B. | F = A ⊕ C |
| C. | F = B ⊙ C |
| D. | F = B ⊕ C |
| Answer» C. F = B ⊙ C | |
| 768. |
The circuit of the given figure performs |
| A. | OR function |
| B. | AND function |
| C. | exclusive OR function |
| D. | exclusive NOR function |
| Answer» C. exclusive OR function | |
| 769. |
Medium scale integration refers to ICs with |
| A. | more than 12 but less than 30 gates on the same chip |
| B. | more than 50 gates on the same chip |
| C. | more than 20 but less than 100 gates on the same chip |
| D. | more than 12 but less than 100 gates on the same chip |
| Answer» E. | |
| 770. |
Square root of 4 is |
| A. | (16)₁₆ |
| B. | (2)₂ |
| C. | (8)₁₆ |
| D. | (5)₁₆ |
| Answer» E. | |
| 771. |
23.6₁₀ = __________ ₂ |
| A. | 11111.1001 |
| B. | 10111.1001 |
| C. | 00111.101 |
| D. | 10111.1 |
| Answer» C. 00111.101 | |
| 772. |
Assertion (A): TTL is a very popular logic in SSI and MSI category.Reason (R): In Schottky TTL the power dissipation is less than in ordinary TTL. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» D. A is false, R is true | |
| 773. |
Symbol in the given figure is IEEE symbol for |
| A. | AND |
| B. | OR |
| C. | NAND |
| D. | NOR |
| Answer» C. NAND | |
| 774. |
Start and stop bit do not contain any information but are used in serial communication for |
| A. | error correction |
| B. | error detection |
| C. | synchronization |
| D. | slowing down the communication |
| Answer» D. slowing down the communication | |
| 775. |
Wired AND connection can be used in TTL with totem pole output. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» C. May be True or False | |
| 776. |
For the DAC in the given figure V₀= |
| A. | 10 V |
| B. | 5 V |
| C. | 4 V |
| D. | 8 V |
| Answer» B. 5 V | |
| 777. |
A universal shift register can shift |
| A. | from left to right |
| B. | from right to left |
| C. | both from left to right and right to left |
| D. | none of the above |
| Answer» D. none of the above | |
| 778. |
Which two rows represent identical binary numbers? |
| A. | A second and fourth |
| B. | Fifth and eight |
| C. | Third and seventh |
| D. | Second and third |
| Answer» E. | |
| 779. |
Out of latch and flip flop, which has clock input? |
| A. | Latch only |
| B. | Flip flop only |
| C. | Both latch and flip flop |
| D. | None |
| Answer» C. Both latch and flip flop | |
| 780. |
Which of the following is equivalent to AND-OR realization? |
| A. | NAND-NOR |
| B. | NOR-NOR |
| C. | NOR-NAND |
| D. | NAND-NAND |
| Answer» E. | |
| 781. |
Data are recorded on a 2, 400 ft reel of magnetic tape at a density of 556 characters per inch. If the record length is of 100 characters and 0.75 inch of record gap, the tape utilization factor is |
| A. | 0.85 |
| B. | 0.67 |
| C. | 0.19 |
| D. | 0.08 |
| Answer» D. 0.08 | |
| 782. |
A 10 bit D/A converter gives a maximum output of 10.23 V. The resolution is |
| A. | 10 mV |
| B. | 20 mV |
| C. | 15 mV |
| D. | 25 mV |
| Answer» B. 20 mV | |
| 783. |
2's complement representation of a 16 bit number (one sign bit and 15 magnitude bits) is FFFF. Its magnitude in decimal representation is |
| A. | 0 |
| B. | 1 |
| C. | 32, 767 |
| D. | 65, 535 |
| Answer» C. 32, 767 | |
| 784. |
If we need a low noise device, we should use |
| A. | BJT |
| B. | FET |
| C. | thyristor |
| D. | UJT |
| Answer» C. thyristor | |
| 785. |
In a digital system, the maximum clock frequency that can be used with Master/Slave Clocked flip-flops having total propagation delay of 200 μsec is |
| A. | 20 MHz |
| B. | 50 MHz |
| C. | 100 MHz |
| D. | 200 MHz |
| Answer» C. 100 MHz | |
| 786. |
Which type of gate is in the given figure? |
| A. | NOR |
| B. | OR |
| C. | NAND |
| D. | EX-OR |
| Answer» E. | |
| 787. |
Which of the following needs DC forward voltage to emit light? |
| A. | LED |
| B. | LCD |
| C. | Both LED as well as LCD |
| D. | None of the above |
| Answer» B. LCD | |
| 788. |
In the given figure assume that initially Q = 1 with Clock Pulses being given, the subsequent states of Q will be |
| A. | 1, 0, 1, 0, 1...... |
| B. | 0, 0, 0, 0, 0...... |
| C. | 1, 1, 1, 1, 1...... |
| D. | 0, 1, 0, 1, 0...... |
| Answer» D. 0, 1, 0, 1, 0...... | |
| 789. |
T-flip-flop is commonly used as |
| A. | a delay switch |
| B. | a digital counter only |
| C. | a digital counter and frequency divider |
| D. | any of the above |
| Answer» D. any of the above | |
| 790. |
Binary multiplication can be done by repeated addition. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» B. False | |
| 791. |
A microprocessor with a 16 bit address bus is used in a linear memory selection configuration. Address bus lines are directly uses as chip selects of memory chips with 4 memory chips the maximum addressable memory space is |
| A. | 64 k |
| B. | 16 k |
| C. | 8 k |
| D. | 4 k |
| Answer» B. 16 k | |
| 792. |
The output data lines of microprocessor and memories are usually tristated because |
| A. | more than one device can transmit information over the data bus by enabling only one device at a time |
| B. | more than one device can transmit information over the data bus at the same time |
| C. | the data lines can be multiplexed for both I/P and O/P |
| D. | it increases the speed of data transfers over the data bus |
| Answer» B. more than one device can transmit information over the data bus at the same time | |
| 793. |
A NOR gate is a combination of |
| A. | OR gate and AND gate |
| B. | AND gate and NOT gate |
| C. | OR gate and NOT gate |
| D. | two NOT gates |
| Answer» D. two NOT gates | |
| 794. |
The applications of shift registers are 1. Time delay2. Ring counter3. Serial to parallel data conversion4. Serial to serial data conversion Which of the above are correct? |
| A. | 1, 2, 3 |
| B. | 2, 3, 4 |
| C. | 1, 2, 3, 4 |
| D. | 1, 2, 4 |
| Answer» D. 1, 2, 4 | |
| 795. |
The number of address lines in EPROM 4096 x 8 is |
| A. | 2 |
| B. | 4 |
| C. | 8 |
| D. | 12 |
| Answer» E. | |
| 796. |
NAND and NOR gates are universal gates. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» B. False | |
| 797. |
The control logic for a binary multiplier is specified by a states diagram. The state diagram has four states and two inputs. To implement it by the sequence register and decoder method. |
| A. | two flip-flop & 2 x 4 decoder are needed |
| B. | four flip-flop & 2 x 4 decoder are needed |
| C. | two flip-flop & 3 x 9 decoder are needed |
| D. | four flip-flop & 3 x 9 decoder are needed |
| Answer» B. four flip-flop & 2 x 4 decoder are needed | |
| 798. |
In a mod-12 counter the input clock frequency is 10 kHz. The output frequency is |
| A. | 0.833 kHz |
| B. | 1.0 kHz |
| C. | 0.91 kHz |
| D. | 0.77 kHz |
| Answer» B. 1.0 kHz | |
| 799. |
If interrupt service request have been received from all of the following interrupts, then which one will be serviced last? |
| A. | RST 5.5 |
| B. | RST 6.5 |
| C. | RST 7.5 |
| D. | None of these |
| Answer» B. RST 6.5 | |
| 800. |
Decimal -90 equals __________ in 8 bit 2s complement |
| A. | 1000 1000 |
| B. | 1010 0110 |
| C. | 1100 1100 |
| D. | 0101 0101 |
| Answer» C. 1100 1100 | |