MCQOPTIONS
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MCQOPTIONS
This section includes 2171 Mcqs, each offering curated multiple-choice questions to sharpen your ENGINEERING SERVICES EXAMINATION (ESE) knowledge and support exam preparation. Choose a topic below to get started.
| 651. |
TRAP is __________ whereas RST 7.5, RST 6.5, RST 5.5 are __________ . |
| A. | maskable, non-maskable |
| B. | maskable, maskable |
| C. | non-maskable, non-maskable |
| D. | non-maskable, maskable |
| Answer» E. | |
| 652. |
The parity bit is |
| A. | always 1 |
| B. | always 0 |
| C. | 1 or 0 |
| D. | none of the above |
| Answer» D. none of the above | |
| 653. |
Which one of the following is D/A conversion technique? |
| A. | Successive approximation |
| B. | Weighted resistor |
| C. | Dual slope |
| D. | Single slope |
| Answer» C. Dual slope | |
| 654. |
For a particular type of memory the access time and cycle time are 200 ns each. The maximum rate at which data can be accessed by |
| A. | 2.5 x 10⁶/s |
| B. | 5 x 10⁶/s |
| C. | 0.2 x 10⁶/s |
| D. | 10⁶/s |
| Answer» B. 5 x 10⁶/s | |
| 655. |
A compiler is a software programme which |
| A. | change high level Programming language into low level machine language |
| B. | change the program into binary form |
| C. | assembles the program |
| D. | executes the program |
| Answer» B. change the program into binary form | |
| 656. |
In which counter does the maximum frequency depend on the modulus? |
| A. | Synchronous |
| B. | Ripple |
| C. | Both synchronous and ripple |
| D. | Neither synchronous nor ripple |
| Answer» C. Both synchronous and ripple | |
| 657. |
In standard TTL the totem pole stage refers to |
| A. | multiemitter input stage |
| B. | phase splitter |
| C. | output buffer |
| D. | open collector output stage |
| Answer» D. open collector output stage | |
| 658. |
The advantage of using dual slope ADC in digital voltmeter is that |
| A. | its conversion time is small |
| B. | its accuracy is high |
| C. | its output is in BCD |
| D. | it does not require a comparator |
| Answer» C. its output is in BCD | |
| 659. |
In a NAND SR latch S = 0, R = 1 then |
| A. | Q = 0 |
| B. | Q = 1, Q̅ = 0 |
| C. | it is race condition |
| D. | none of the above |
| Answer» C. it is race condition | |
| 660. |
ECL has high switching speed because the transistors are |
| A. | switching between cutoff and saturation regions |
| B. | switching between cutoff and active regions |
| C. | switching between active and saturation regions |
| D. | none of the above |
| Answer» C. switching between active and saturation regions | |
| 661. |
74HCT00 series is |
| A. | NAND IC |
| B. | interface between TTL and CMOS |
| C. | inverting IC |
| D. | NOR IC |
| Answer» C. inverting IC | |
| 662. |
In 8085 microprocessor, if instruction RST is written in a program then the program will jump to location |
| A. | 0020 H |
| B. | 0024 H |
| C. | 0028 H |
| D. | 002 CH |
| Answer» D. 002 CH | |
| 663. |
A pair of 21114s can store __________ words of __________ bits each. |
| A. | 2114, 8 |
| B. | 1024, 8 |
| C. | 4228, 16 |
| D. | 2114, 16 |
| Answer» C. 4228, 16 | |
| 664. |
The number of counter states which an 8 bit stair step A/D converter has to pass through before conversion takes place is equal to |
| A. | 1 |
| B. | 8 |
| C. | 255 |
| D. | 256 |
| Answer» E. | |
| 665. |
The following program starts at location 0100HL X ISP, 00FF - the content if accumulatorLXIH, 0701 - when the program counterMVI A, 20 H - reaches 0109 H is S U BM |
| A. | 20 H |
| B. | 02 H |
| C. | 00 H |
| D. | FFH |
| Answer» B. 02 H | |
| 666. |
A . 0 = |
| A. | 1 |
| B. | A |
| C. | 0 |
| D. | A or 1 |
| Answer» D. A or 1 | |
| 667. |
The ALU carrier out arithmetic and logic operations (OR AND, NOT, etc.) it processes |
| A. | decimal numbers |
| B. | binary numbers |
| C. | hexadecimal numbers |
| D. | octal numbers |
| Answer» C. hexadecimal numbers | |
| 668. |
If the number of information bits is m, the number of parity bits p in the Hamming code is given by equation |
| A. | 2ᴾ = m + p + 1 |
| B. | 2ᴾ ≥ m + p + 1 |
| C. | 2ᴾ = m + p |
| D. | 2ᴾ ≥ m + p |
| Answer» C. 2ᴾ = m + p | |
| 669. |
In a D latch |
| A. | data bit D is fed to S input and D to R input |
| B. | data bit D is fed to R input and D to S input |
| C. | data bit D is fed to both R and S inputs |
| D. | data bit D is not fed to any input |
| Answer» B. data bit D is fed to R input and D to S input | |
| 670. |
The MOS symbols shown indicates:1. that it is depletion type2. that it is enhancement type3. that it is n channel4. that it is p channel5. that electrons flow from D to S6. that holes flow from D to SThe only true statements are |
| A. | 1, 3, 6 |
| B. | 2, 4, 6 |
| C. | 1, 3, 5 |
| D. | 2, 3, 6 |
| Answer» B. 2, 4, 6 | |
| 671. |
The circuit given below is a |
| A. | counter |
| B. | digital to analog converter |
| C. | two-bit series-to-parallel converter |
| D. | analog-to digital converter |
| Answer» D. analog-to digital converter | |
| 672. |
Periodic recharging of the memory cells at regular intervals of 3 to 8 millisecond is required in a |
| A. | ROM |
| B. | Static RAM |
| C. | Dynamic RAM |
| D. | PLA |
| Answer» D. PLA | |
| 673. |
In a decimal digital computer, the number 127 is stored |
| A. | 1111111 |
| B. | 0001 00100111 |
| C. | 10001 |
| D. | 11000111 |
| Answer» B. 0001 00100111 | |
| 674. |
Assertion (A): Master slave JK flip flop is commonly used in high speed synchronous circuitry Reason (R): Master slave JK flip flop uses two JK flip flops in cascade. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |
| 675. |
The access time of ROM using bipolar transistors is about |
| A. | 1 sec |
| B. | 1 mili sec |
| C. | 1 μ sec |
| D. | 1 n sec |
| Answer» D. 1 n sec | |
| 676. |
A parallel in-parallel out shift register can be used to introduce delay in digital circuits. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» C. May be True or False | |
| 677. |
Digital circuits mostly use |
| A. | Diodes |
| B. | Bipolar transistors |
| C. | Diodes and bipolar transistors |
| D. | Bipolar transistors and FETs |
| Answer» D. Bipolar transistors and FETs | |
| 678. |
In 8085 microprocessor, what is the length of A-register? |
| A. | 6 bits |
| B. | 8 bits |
| C. | 12 bits |
| D. | 16 bits |
| Answer» C. 12 bits | |
| 679. |
A microcomputer has memory locations from 0000 to FFFF, each storing 1 byte. How many bytes can be the memory store? |
| A. | 12333 |
| B. | 14666 |
| C. | 16384 |
| D. | 16655 |
| Answer» D. 16655 | |
| 680. |
How many flag are there in 8085 microprocessor? |
| A. | 4 |
| B. | 5 |
| C. | 6 |
| D. | 8 |
| Answer» C. 6 | |
| 681. |
The function Y = AC + BD + EF is |
| A. | POS |
| B. | SOP |
| C. | Hybrid |
| D. | none of the above |
| Answer» C. Hybrid | |
| 682. |
Out of S, R, J, K, Preset, Clear inputs to flip flops, the synchronous inputs are |
| A. | S, R, J, K only |
| B. | S, R, Preset, Clear only |
| C. | Preset, Clear only |
| D. | S, R only |
| Answer» B. S, R, Preset, Clear only | |
| 683. |
The counter shown in the given figure is |
| A. | Synchronous |
| B. | Johnson |
| C. | Ring |
| D. | None of the above |
| Answer» E. | |
| 684. |
Which of the following is coincidence logic circuit? |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» B. B | |
| 685. |
The reason for glitches on the outputs of decoding gates on a synchronous counter is |
| A. | FFs changing states together |
| B. | FFs changing states one at a time |
| C. | AND gates not functioning properly |
| D. | none of the above |
| Answer» C. AND gates not functioning properly | |
| 686. |
In 8085 microprocessor, which of the following interrupts has the highest priority? |
| A. | RST 5.5 |
| B. | RST 7.5 |
| C. | TRAP |
| D. | INTR |
| Answer» D. INTR | |
| 687. |
For a level input sequential circuit |
| A. | output in a level only |
| B. | output is in the pulse form |
| C. | output may be a pulse or a level form |
| D. | none of these |
| Answer» B. output is in the pulse form | |
| 688. |
For a logic familyVOH is the minimum output high level voltage VOL is the maximum output low level voltageVIH is the minimum acceptable input high level voltageVIL is the maximum acceptable input low level voltage The correct relationship is |
| A. | VIH > V0H > VIL > V0L |
| B. | VOH > VIH > VIL > V0L |
| C. | VIH > VOH > VOL > VIL |
| D. | VOH > VIH > VOL > VIL |
| Answer» D. VOH > VIH > VOL > VIL | |
| 689. |
The maximum counting range of a four stage counter using IC 74193 is |
| A. | 0 to 1023 |
| B. | 0 to 4093 |
| C. | 0 to 65535 |
| D. | 0 to 131071 |
| Answer» D. 0 to 131071 | |
| 690. |
Read cycle is always followed by (during instructions execution) |
| A. | read cycle |
| B. | write cycle |
| C. | delete signal |
| D. | none of these |
| Answer» C. delete signal | |
| 691. |
A 12 bit ADC is employed to convert an analog voltage of zero to 10 volts. The resolution of the ADC is |
| A. | 2.44 mV |
| B. | 24.4 mV |
| C. | 83.3 mV |
| D. | 1.2 V |
| Answer» B. 24.4 mV | |
| 692. |
If A = 0101, then A' is |
| A. | 1010 |
| B. | 1011 |
| C. | 1001 |
| D. | 0110 |
| Answer» C. 1001 | |
| 693. |
A two-input OR gate is designed for positive logic. However, it is operated with negative logic. The resulting logic operation will then be |
| A. | OR |
| B. | AND |
| C. | NOR |
| D. | EX-OR |
| Answer» B. AND | |
| 694. |
For the logic circuit of the given figure, Y = |
| A. | A + BC |
| B. | BC |
| C. | AB |
| D. | AB + C |
| Answer» D. AB + C | |
| 695. |
Assertion (A): In totem pole output the output impedance is low.Reason (R): TTL gate with active pull up should not be used in wired AND connection. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 696. |
Which converters uses integrating op-amp? |
| A. | Parallel A/D converter |
| B. | Single slope A/D converter |
| C. | Dual slope A/D converter |
| D. | Both (b) and (c) |
| Answer» D. Both (b) and (c) | |
| 697. |
The address to which a software or hardware restart branches is known as |
| A. | Vector location |
| B. | SID |
| C. | SOD |
| D. | TRAP |
| Answer» B. SID | |
| 698. |
9's complement of 56₁₀ is |
| A. | 43₁₀ |
| B. | 84₁₀ |
| C. | 65₁₀ |
| D. | 53₁₀ |
| Answer» B. 84₁₀ | |
| 699. |
Which one of the following is loaded in the main memory by the bootstrap loader? |
| A. | System data |
| B. | User program |
| C. | BIOS |
| D. | Part of DOS |
| Answer» E. | |
| 700. |
In 8085 microprocessor, what is the length of Data Buffer Register? |
| A. | 6 bits |
| B. | 8 bits |
| C. | 12 bits |
| D. | 16 bits |
| Answer» C. 12 bits | |