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This section includes 883 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics & Communication Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 151. |
In microprocessors, the IC (instruction cycle), FC (fetch cycle) and EC (executive cycle) are related as |
| A. | IC = FC - EC |
| B. | IC = FC + EC |
| C. | FC = IC + EC |
| D. | EC = IC + FC |
| Answer» C. FC = IC + EC | |
| 152. |
Following program finds absolute value of N:MVI A, NORA AJM ONEOUT 01HHLTONE: P Q OUT 01 H HLTThe instruction of P and Q must be: |
| A. | CMA and ADI 00H |
| B. | CMC and ADI 00H |
| C. | INR A and CMC |
| D. | INR A and CMA |
| Answer» B. CMC and ADI 00H | |
| 153. |
A 32 bit microprocessor has word length equal to |
| A. | 1 byte |
| B. | 2 byte |
| C. | 4 byte |
| D. | 8 byte |
| Answer» D. 8 byte | |
| 154. |
A memory system has a total of 8 memory chips each with 12 address lines and 4 data lines. The total size of the memory system is |
| A. | 16 kbytes |
| B. | 32 kbytes |
| C. | 48 kbytes |
| D. | 64 kbytes |
| Answer» B. 32 kbytes | |
| 155. |
In a microprocessor-based system, a DMA facility is required to increase the speed of the data transfer between the |
| A. | Microprocessor and the memory |
| B. | Microprocessor and the I/O devices |
| C. | Memory and the I/O devices |
| D. | Memory and register |
| Answer» D. Memory and register | |
| 156. |
An 8-bit microcontroller with 16 address lines has 3 fixed interrupts i.e., Int1, Int2 and Int3 with corresponding interrupt vector addresses as 0008H, 0010H and 0018H. To execute a 32-byte long Interrupt Service Subroutine for Int1 starting at the address ISS1, the location 0008H onwards should ideally contain |
| A. | a CALL to ISS1 |
| B. | an unconditional JUMP to ISS1 |
| C. | a conditional JUMP to ISS1 |
| D. | Both (1) and (2) |
| Answer» E. | |
| 157. |
Both the ALU and control section of CPU employ which special purpose storage location? |
| A. | Buffers |
| B. | Decoders |
| C. | Accumulators |
| D. | Registers |
| Answer» D. Registers | |
| 158. |
Directions: The item consists of two statements, one labelled as the ‘Assertion (A)’ and the other as ‘Reason (R)’.You are to examine these two statements carefully and select the answers to the item using the codes given below:Assertion (A): Logic analyzer offers a "delayed sweep".Reason (R): Because the logic analyzer "sweep" is really a clock signal. |
| A. | Both A and R individually true and R is the correct explanation of A |
| B. | Both A and R are individually true but R is not the correct explanation of A |
| C. | A is true but R is false |
| D. | A is false but R is true |
| Answer» B. Both A and R are individually true but R is not the correct explanation of A | |
| 159. |
An 8 bit microcontroller has an external RAM with the memory map from 8000 H to 9FFF H. How many number of bytes can this RAM store? |
| A. | 1999 |
| B. | 8192 |
| C. | 8191 |
| D. | 8000 |
| Answer» C. 8191 | |
| 160. |
In which of the following number systems, AC flag is used in 8085 μP? |
| A. | Octal |
| B. | BCD |
| C. | Binary |
| D. | Hexadecimal |
| Answer» C. Binary | |
| 161. |
Number of active flags in 16-bit register of 8086 is: |
| A. | 9 |
| B. | 8 |
| C. | 7 |
| D. | 16 |
| Answer» B. 8 | |
| 162. |
How many bytes are there in a nibble? |
| A. | one - fourth |
| B. | half |
| C. | 2 |
| D. | 4 |
| Answer» C. 2 | |
| 163. |
_________ is a low-level language |
| A. | Fortran |
| B. | Machine Language |
| C. | binary |
| D. | Pascal |
| Answer» C. binary | |
| 164. |
Determine the contents of accumulator if the instruction RAL is executed twice. Assume the contents of accumulator is AAH and CY = 0. |
| A. | B0H |
| B. | ACH |
| C. | A3H |
| D. | A9H |
| Answer» E. | |
| 165. |
Directions: The item consists of two statements, one labelled as the ‘Assertion (A)’ and the other as ‘Reason (R)’.You are to examine these two statements carefully and select the answers to the item using the codes given below:Assertion (A): The main difference between a microprocessor and a microcontroller is that the former does not have any on-chip main memory whereas letter has.Reason (R): A microprocessor does not need memory to run programs. |
| A. | Both A and R individually true and R is the correct explanation of A |
| B. | Both A and R are individually true but R is not the correct explanation of A |
| C. | A is true but R is false |
| D. | A is false but R is true |
| Answer» C. A is true but R is false | |
| 166. |
In 8085 RRC stands for: |
| A. | Rotate Accumulator right |
| B. | Rotate Accumulator right through carry |
| C. | Rotate Right carry |
| D. | Rotate Right carry through Accumulator |
| Answer» B. Rotate Accumulator right through carry | |
| 167. |
If the contents of register AX is 4C26H, which of the following instructions clear the contents of accumulator (AX) in case of 8086 microprocessor?a) NOT AXb) XOR AX, AXc) SUB AX, AXd) NEG AXChoose the correct answer: |
| A. | and c) |
| B. | and c) |
| C. | b), c) and d) |
| D. | and b) |
| Answer» C. b), c) and d) | |
| 168. |
On the 8085, which of the following machine cycles are not used in the CALL instruction?1. Instruction fetch2. I/O3. Memory Read4. Memory Write |
| A. | 2 only |
| B. | 1 and 4 only |
| C. | 2, 3 and 4 |
| D. | 1, 2, 3 and 4 |
| Answer» B. 1 and 4 only | |
| 169. |
Directions: It consists of two statements, one labeled as the ‘Statement (I)’ and the other as ‘Statement (II)’. Examine these two statements carefully and select the answer using the codes given below:Statement (I): Ready signal of microprocessor is used to detect whether a peripheral is ready for the data transfer or not.Statement (II): In the microprocessor during data transfer operations, the wait states are added by forcing the ready signal low. |
| A. | Statement (I) and Statement (II) are individually true and statement (II) is the correct explanation of statement (II) |
| B. | Statement (I) and Statement (II) are individually true but statement (II) is not the correct explanation of statement (I) |
| C. | Statement (I) is true but statement (II) is false |
| D. | Statement (I) is false but statement (II) is true |
| Answer» B. Statement (I) and Statement (II) are individually true but statement (II) is not the correct explanation of statement (I) | |
| 170. |
MPU connections to the data bus are considered __________ |
| A. | input |
| B. | output |
| C. | both inputs and outputs |
| D. | none of these |
| Answer» D. none of these | |
| 171. |
No member of the 8051 family can use more than _________ bytes of opcode. |
| A. | 64k |
| B. | 16k |
| C. | 32k |
| D. | 8k |
| Answer» B. 16k | |
| 172. |
In 8085 processor, Register B contains 0X03 and Register C contains 0X04, What is the content of the Accumulator after the execution of the program given belowMVI A, 0X00HLOOP:ADD BDCR CJNZ LOOPHLT |
| A. | 0X03 |
| B. | 0X07 |
| C. | 0X0C |
| D. | 0X0F |
| Answer» D. 0X0F | |
| 173. |
Memory address space of 8085A microprocessor is: |
| A. | 8 KB |
| B. | 16 KB |
| C. | 32 KB |
| D. | 64 KB |
| E. | 128 KB |
| Answer» E. 128 KB | |
| 174. |
An interrupt in which an external device supplies its address and the interrupt request, is called: |
| A. | poll interrupt |
| B. | maskable interrupt |
| C. | non-maskable interrupt |
| D. | vectored interrupt |
| Answer» E. | |
| 175. |
Match the following Lists: List - I List-II (a) No. of Parallel Ports in 8051(i) 2 (b) No. of Registers in each DMA channel of 8257(ii) 3 (c) Type of hardware interrupts in 8085(iii) 4 (d) No. of priority modes in 8259(iv) 5 Correct code are: |
| A. | a-iii, b-i, c-iv, d-ii |
| B. | a-ii, b-iii, c-i, d-iv |
| C. | a-i, b-iv, c-iii, d-ii |
| D. | a-iv, b-ii, c-iii, d-i |
| Answer» B. a-ii, b-iii, c-i, d-iv | |
| 176. |
After the execution of the given statements, determine the status of PSW.MOV A, #0BFHADD A, #1BH |
| A. | 11010001 |
| B. | 01011011 |
| C. | 01000001 |
| D. | 10100001 |
| Answer» D. 10100001 | |
| 177. |
PSW stands for: |
| A. | Program status word |
| B. | Process status word |
| C. | Peripheral status word |
| D. | Program store word |
| Answer» B. Process status word | |
| 178. |
JMP 2034H in 8085 μp is an example of. |
| A. | 1-byte instruction |
| B. | 2-byte instruction |
| C. | 3-byte instruction |
| D. | None of the above |
| Answer» D. None of the above | |
| 179. |
Consider the symbol shown below:What function does the above symbol represent in a program flow chart? |
| A. | A process |
| B. | Decision making |
| C. | A subroutine |
| D. | Continuation |
| Answer» D. Continuation | |
| 180. |
An 8086 address bus is a/am _____ -bit bus |
| A. | 8 |
| B. | 16 |
| C. | 20 |
| D. | 32 |
| Answer» D. 32 | |
| 181. |
Arrange the following pins of 8086 μp in the descending order:(a) INTR(b) ADo(c) \(MN/\overline {MX} \)(d) \(\overline {{\text{LOCK}}} \)The correct sequence is: |
| A. | (b), (c), (a), (d) |
| B. | (c), (d), (a), (b) |
| C. | (d), (b), (c), (a) |
| D. | (a), (d), (b), (c) |
| Answer» C. (d), (b), (c), (a) | |
| 182. |
Directions: It consists of two statements, one labelled as the ‘Statement (I)’ and the other as ‘Statement (II). Examine these two statements carefully and select the answer using the codes given below:Statement (I): Segment Override Prefix (SOP) is used when a default offset register is not used with its default base segment register, but with a different base register.Statement (II): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. |
| A. | Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I) |
| B. | Both Statement (I) and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I) |
| C. | Statement (I) is true but Statement (II) is false |
| D. | Statement (I) is false but Statement (II) is true |
| Answer» C. Statement (I) is true but Statement (II) is false | |
| 183. |
In an 8085 microprocessor, the contents of the accumulator and the carry flag are A7 (in hex) and 0, respectively. If the instruction RLC is executed, then the contents of the accumulator (in hex) and the carry flag, respectively, will be |
| A. | 4E and 0 |
| B. | 4E and 1 |
| C. | 4F and 0 |
| D. | 4F and 1 |
| Answer» E. | |
| 184. |
Directions: It consists of two statements, one labeled as the ‘Statement (I)’ and the other as ‘Statement (II)’. Examine these two statements carefully and select the answer using the codes given below:Statement (I): The main difference between a micro-processor and a micro-controller is that the former does not have any on chip memory.Statement (II): A micro-processor does not need memory to run programmes. |
| A. | Statement (I) and Statement (II) are individually true and statement (II) is the correct explanation of statement (II) |
| B. | Statement (I) and Statement (II) are individually true but statement (II) is not the correct explanation of statement (I) |
| C. | Statement (I) is true but statement (II) is false |
| D. | Statement (I) is false but statement (II) is true |
| Answer» D. Statement (I) is false but statement (II) is true | |
| 185. |
8085 is a/an ______ -bit processor |
| A. | 8 |
| B. | 16 |
| C. | 24 |
| D. | 64 |
| Answer» B. 16 | |
| 186. |
Find the content of the accumulator after the execution of the following program:MVI A, F0 HORI FF HXRI F0 H |
| A. | 00H |
| B. | F0H |
| C. | 0FH |
| D. | FFH |
| Answer» D. FFH | |
| 187. |
Consider the following statements regarding RESET instruction of 8085 microprocessor1. PC contents become 0000H.2. All interrupts are enabled.3. RESET OUT pin is at logic 0.Which of the above statements is/are correct? |
| A. | 1 only |
| B. | 2 only |
| C. | 1 and 2 |
| D. | 2 and 3 |
| Answer» B. 2 only | |
| 188. |
How many dual-purpose ports are there in the 8051 microcontroller? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 1 |
| Answer» C. 4 | |
| 189. |
Program counter for any counter: |
| A. | Accumulates the results |
| B. | Stores the current instruction |
| C. | Stores the current updated value in any register |
| D. | Stores the address of the next instruction to be executed |
| Answer» E. | |
| 190. |
In 8086, the result of MOV AL, 65 is to store |
| A. | 0100 0010 in AL |
| B. | 42 H in AL |
| C. | 40 H in AL |
| D. | 0100 0001 in AL |
| Answer» E. | |
| 191. |
Consider the following interrupts for 8085 microprocessor:1. INTR2. RST 5.53. RST 6.54. RST 7.55. TRAPIf the interrupt is to be non vectored to any memory location, then which of the above interrupts is/are correct? |
| A. | 1 and 2 only |
| B. | 1, 2, 3 and 4 |
| C. | 5 only |
| D. | 1 only |
| Answer» E. | |
| 192. |
Following are the intercepts for SIM instruction:(i) Serial Output Data (SOD)(ii) Mark Set Enable (MSE)(iii) SOD Enable (SDE)(iv) Reset RST 7.5 (R7.5)Arrange them in ascending order. |
| A. | (ii),(iv), (iii), (i) |
| B. | (iv), (ii), (iii), (i) |
| C. | (i), (ii), (iii), (iv) |
| D. | (ii), (iii), (iv) (i) |
| Answer» B. (iv), (ii), (iii), (i) | |
| 193. |
Among the given instructions, the one which affects maximum number of flags is |
| A. | RAL |
| B. | POP PSW |
| C. | XRA A |
| D. | DCR A |
| Answer» D. DCR A | |
| 194. |
An 8085 microprocessor executes “STA 1234H” with starting address location 1FFEH (STA copies the contents of the Accumulator to the 16-bit address location). While the instruction is fetched and executed, the sequence of values written at the address pins A15 − A8 is |
| A. | 1FH, 1FH, 20H, 12H |
| B. | 1FH, FEH, 1FH, FFH, 12H |
| C. | 1FH, 1FH, 12H, 12H |
| D. | 1FH, 1FH, 12H, 20H, 12H |
| Answer» B. 1FH, FEH, 1FH, FFH, 12H | |
| 195. |
Of the 128-byte internal RAM of the 8051 Microcontroller, how many bytes are bit addressable? |
| A. | 4 bytes |
| B. | 16 bytes |
| C. | 32 bytes |
| D. | 64 bytes |
| Answer» C. 32 bytes | |
| 196. |
ADA is |
| A. | machine code |
| B. | assembly language |
| C. | high level language |
| D. | None of thes |
| Answer» D. None of thes | |
| 197. |
A microprocessor based system can perform many different functions, because: |
| A. | Its operation is controlled by software |
| B. | It is digital system |
| C. | It uses a RAM |
| D. | It can be controlled by input and output devices |
| Answer» B. It is digital system | |
| 198. |
Each instruction in an assembly language program has the following fields.1. Label field2. Mnemonic field3. Operand field4. Comment fieldWhat is the correct sequence of these fields? |
| A. | 1, 2, 3 and 4 |
| B. | 2, 1, 4 and 3 |
| C. | 1, 3, 2 and 4 |
| D. | 2, 4, 1 and 3 |
| Answer» B. 2, 1, 4 and 3 | |
| 199. |
How many bits are needed to address 64k memory location? |
| A. | 8 |
| B. | 10 |
| C. | 16 |
| D. | 32 |
| Answer» D. 32 | |
| 200. |
A microprocessor with 12-bit address bus will be able to access ______ kilobytes of memory |
| A. | 0.4 |
| B. | 2 |
| C. | 10 |
| D. | 4 |
| Answer» E. | |