Explore topic-wise MCQs in Electronics & Communication Engineering.

This section includes 1271 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics & Communication Engineering knowledge and support exam preparation. Choose a topic below to get started.

1.

Convert the following decimal number to 8-bit binary.

A. 101110112
B. 110111012
C. 101111012
D. 101111002
Answer» B. 110111012
2.

Parity systems are defined as either________ or ________ and will add an extra ________ tothe digital information being transmitted.

A. positive, negative, byte
B. odd, even, bit
C. upper, lower, digit
D. on, off, decimal
Answer» C. upper, lower, digit
3.

What happens if the input is low in FSM?

A. change of state
B. no transition in state
C. remains in a single state
D. invalid state
Answer» C. remains in a single state
4.

How many types of the counter are there?

A. 2
B. 3
C. 4
D. 5
Answer» C. 4
5.

Dynamic RAM employs

A. capacitor or mosfet
B. fet or jfet
C. capacitor or bjt
D. bjt or mos
Answer» B. fet or jfet
6.

Can an encoder be called as multiplexer?

A. no
B. yes
C. sometimes
D. never
Answer» C. sometimes
7.

ECL’s major disadvantage is that

A. it requires more power
B. it’s fanout capability is high
C. it creates more noise
D. it is slow
Answer» B. it’s fanout capability is high
8.

In the given 4-to-1 multiplexer, if c1 = 0 and c0 = 1 then the output M is

A. x0
B. x1
C. x2
D. x3
Answer» C. x2
9.

If minuend = 0, subtrahend = 1 and borrow input = 1 in a full subtractor then the borrow output will be

A. 0
B. 1
C. floating
D. high impedance
Answer» C. floating
10.

In the FSM diagram, what does arrow between the circles represent?

A. change of state
B. state
C. output value
D. initial state
Answer» B. state
11.

What is ripple carry adder?

A. the carry output of the lower order stage is connected to the carry input of the next higher order stage
B. the carry input of the lower order stage is connected to the carry output of the next higher order stage
C. the carry output of the higher order stage is connected to the carry input of the next lower order stage
D. the carry input of the higher order stage is connected to the carry output of the lower order stage
Answer» B. the carry input of the lower order stage is connected to the carry output of the next higher order stage
12.

ECL was invented in                by

A. 1956, baker clamp
B. 1976, james r. biard
C. 1956, hannon s. yourke
D. 1976, yourke
Answer» D. 1976, yourke
13.

On addition of -46 and +28 using 2’s complement, we get

A. 00101110
B. 0101110
C. 00101111
D. 1001111
Answer» C. 00101111
14.

PLD contains a large number of

A. flip-flops
B. gates
C. registers
D. all of the mentioned
Answer» E.
15.

The instruction used in a program for executing them is stored in the

A. cpu
B. control unit
C. memory
D. microprocessor
Answer» D. microprocessor
16.

The decimal number system represents the decimal number in the form of

A. hexadecimal
B. binary coded
C. octal
D. decimal
Answer» C. octal
17.

If enable input is high then the multiplexer is

A. enable
B. disable
C. saturation
D. high impedance
Answer» C. saturation
18.

Fusing process is

A. reversible
B. irreversible
C. synchronous
D. asynchronous
Answer» C. synchronous
19.

The FPGA refers to

A. first programmable gate array
B. field programmable gate array
C. first program gate array
D. field program gate array
Answer» C. first program gate array
20.

The sequential circuit is also called

A. flip-flop
B. latch
C. strobe
D. adder
Answer» C. strobe
21.

How much locations an 8-bit address code can select in memory?

A. 8 locations
B. 256 locations
C. 65,536 locations
D. 131,072 locations
Answer» C. 65,536 locations
22.

Number of outputs in a half adder

A. 1
B. 2
C. 3
Answer» C. 3
23.

A combinational circuit that selects one from many inputs are

A. encoder
B. decoder
C. demultiplexer
D. multiplexer
Answer» E.
24.

What is the major difference between half- adders and full-adders?

A. full-adders are made up of two half-adders
B. full adders can handle double-digit numbers
C. full adders have a carry input capability
D. half adders can handle only single-digit numbers
Answer» D. half adders can handle only single-digit numbers
25.

Computers invariably use RAM for

A. high complexity
B. high resolution
C. high speed main memory
D. high flexibility
Answer» D. high flexibility
26.

In ROM, each bit combination that comes out of the output lines is called

A. memory unit
B. storage class
C. data word
D. address
Answer» D. address
27.

Finite state machines are combinational logic systems.

A. true
B. false
Answer» C.
28.

The expression Y=(A+B)(B+C)(C+A) shows the                    operation.

A. and
B. pos
C. sop
D. nand
Answer» C. sop
29.

(A + B)(A’ * B’) = ?

A. 1
B. 0
C. ab
D. ab’
Answer» C. ab
30.

A circuit that compares two numbers and determine their magnitude is called

A. height comparator
B. size comparator
C. comparator
D. magnitude comparator
Answer» E.
31.

How many AND gates are required for a 1- to-8 multiplexer?

A. 2
B. 6
C. 8
D. 5
Answer» D. 5
32.

In FSM diagram what does circle represent?

A. change of state
B. state
C. output value
D. initial state
Answer» C. output value
33.

Each product term of a group, w’.x.y’ and w.y, represents the                         in that group.

A. input
B. pos
C. sum-of-minterms
D. sum of maxterms
Answer» D. sum of maxterms
34.

Complement of the expression A’B + CD’ is

A. (a’ + b)(c’ + d)
B. (a + b’)(c’ + d)
C. (a’ + b)(c’ + d)
D. (a + b’)(c + d’)
Answer» C. (a’ + b)(c’ + d)
35.

Canonical form is a unique way of representing

A. sop
B. minterm
C. boolean expressions
D. pos
Answer» D. pos
36.

The octal equivalent of the decimal number (417)10 is

A. (641)8
B. (619)8
C. (640)8
D. (598)8
Answer» B. (619)8
37.

Carry out BCD subtraction for (68) – (61) using 10’s complement method.

A. 00000111
B. 01110000
C. 100000111
D. 011111000
Answer» B. 01110000
38.

The number of logic gates and the way of their interconnections can be classified as

A. logical network
B. system network
C. circuit network
D. gate network
Answer» B. system network
39.

When performing subtraction by addition in the 2’s-complement system

A. the minuend and the subtrahend are both changed to the 2’s-complement
B. the minuend is changed to 2’s- complement and the subtrahend is left in its original form
C. the minuend is left in its original form and the subtrahend is changed to its 2’s- complement
D. the minuend and subtrahend are both left in their original form
Answer» D. the minuend and subtrahend are both left in their original form
40.

If A and B are the inputs of a half adder, the carry is given by

A. a and b
B. a or b
C. a xor b
D. a ex-nor b
Answer» B. a or b
41.

Which IC is used for the implementation of 1-to-16 DEMUX?

A. ic 74154
B. ic 74155
C. ic 74139
D. ic 74138
Answer» B. ic 74155
42.

It should be kept in mind that don’t care terms should be used along with the terms that are present in

A. minterms
B. expressions
C. k-map
D. latches
Answer» B. expressions
43.

How many addresses a MOS EPROM have?

A. 1024
B. 512
C. 2516
D. 256
Answer» D. 256
44.

The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as

A. noise margin
B. noise immunity
C. white noise
D. signal to noise ratio
Answer» C. white noise
45.

Moore machine output is synchronous.

A. true
B. false
Answer» B. false
46.

ROMs retain data when

A. power is on
B. power is off
C. system is down
D. all of the mentioned
Answer» E.
47.

A procedure that specifies finite set of steps is called

A. algorithm
B. flow chart
C. chart
D. venn diagram
Answer» B. flow chart
48.

How many OR gates are required for an octal-to-binary encoder?

A. 3
B. 2
C. 8
D. 10
Answer» B. 2
49.

How many full adders are required to construct an m-bit parallel adder?

A. m/2
B. m
C. m-1
D. m+1
Answer» D. m+1
50.

The full subtractor can be implemented using

A. two xor and an or gates
B. two half subtractors and an or gate
C. two multiplexers and an and gate
D. two comparators and an and gate
Answer» C. two multiplexers and an and gate