Explore topic-wise MCQs in Engineering.

The primary use for Gray code is:

Why is a demultiplexer called a data distributor?

A BCD decoder will have how many rows in its truth table?

How many possible outputs would a decoder have with a 6-bit binary input?

Most demultiplexers facilitate which type of conversion?

Why can a CMOS IC be used as both a multiplexer and a demultiplexer?

A principle regarding most IC decoders is that when the correct input is present, the related output will switch:

One way to convert BCD to binary using the hardware approach is:

The inputs/outputs of an analog multiplexer/demultiplexer are:

What control signals may be necessary to operate a 1-line-to-16 line decoder?

How many inputs will a decimal-to-BCD encoder have?

What type of register is shown below?

One multiplexer can take the place of:

How many exclusive-NOR gates would be required for an 8-bit comparator circuit?

How many inputs are required for a 1-of-10 BCD decoder?

What is the function of an enable input on a multiplexer chip?

The expansion inputs to a comparator are used for expansion to a(n):

A basic multiplexer principle can be demonstrated through the use of a:

A BCD counter is a ________.

Integrated-circuit counter chips are used in numerous applications including:

What decimal value is required to produce an output at "X" ?

Synchronous construction reduces the delay time of a counter to the delay of:

Synchronous counters eliminate the delay problems encountered with asynchronous counters because the:

What is the difference between combinational logic and sequential logic?

What is the difference between a 7490 and a 7492?

List which pins need to be connected together on a 7492 to make a MOD-12 counter.

What is the maximum delay that can occur if four flip-flops are connected as a ripple counter and each flip-flop has propagation delays of t_PHL = 22 ns and t_PLH = 15 ns?

Which is not an example of a truncated modulus?

Four cascaded modulus-10 counters have an overall modulus of ________.

Which of the following statements best describes the operation of a synchronous up-/down-counter?

The parallel outputs of a counter circuit represent the:

Any divide-by-N counter can be formed by using external gating to ________ at a predetermined number.

On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.

Why are the S and R inputs of a gated flip-flop said to be synchronous?

In VHDL, how many inputs will a primitive JK flip-flop have?

The symbols on this flip-flop device indicate ________.

Which of the following describes the operation of a positive edge-triggered D flip-flop?

How can a digital one-shot be implemented using HDL?

How many outputs would two 8-line-to-3-line encoders, expanded to a 16-line-to-4-line encoder, have?

The device shown here is most likely a ________.

The design concept of using building blocks of circuits in a PLD program is called a(n):

When adding an even parity bit to the code 110010, the result is ________.

Which of the following combinations of logic gates can decode binary 1101?

Which gate is best used as a basic comparator?

Which step in this reduction process is using DeMorgan's theorem?

The device shown here is most likely a ________.

The Boolean equation for a NOR function is:

For an S-R flip-flop to be set or reset, the respective input must be:

An active-HIGH input S-R latch has a 1 on the S input and a 0 on the R input. What state is the latch in?

In VHDL, in which declaration section is a COMPONENT declared?