MCQOPTIONS
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MCQOPTIONS
This section includes 1271 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics & Communication Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 151. |
The binary number 10101 is equivalent to decimal number ___________. |
| A. | 19 |
| B. | 12 |
| C. | 27 |
| D. | 21 |
| Answer» E. | |
| 152. |
Digital circuit can be made by the repeated use of ___________ |
| A. | OR gates |
| B. | NOT gates |
| C. | NAND gates |
| D. | None of the above |
| Answer» D. None of the above | |
| 153. |
Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits? |
| A. | State Reduction |
| B. | State Minimization |
| C. | State Assignment |
| D. | State Evaluation |
| Answer» D. State Evaluation | |
| 154. |
The universal gate is ___________ |
| A. | NAND gate |
| B. | OR gate |
| C. | AND gate |
| D. | None of the above |
| Answer» B. OR gate | |
| 155. |
The fan put of a 7400 NAND gate is |
| A. | 2TTL |
| B. | 5TTL |
| C. | 8TTL |
| D. | 10TTL |
| Answer» E. | |
| 156. |
Consider the following statements Timer 555 can be used as monostable multivibratorbistable multivibratorastable multivibrator Which of the above statements are correct? |
| A. | 1 and 2 |
| B. | 1 and 3 |
| C. | 2 and 3 |
| D. | 1, 2, 3 |
| Answer» C. 2 and 3 | |
| 157. |
The communicating capacitor reduces turn on time because |
| A. | it acts as an open circuit |
| B. | it allows maximum base circuit to flow |
| C. | it aids in removing the excess carrier from the base region |
| D. | none of these |
| Answer» C. it aids in removing the excess carrier from the base region | |
| 158. |
A . 0 = |
| A. | 1 |
| B. | A |
| C. | 0 |
| D. | A or 1 |
| Answer» D. A or 1 | |
| 159. |
In an R-S latch, race condition occurs when |
| A. | R and S are low |
| B. | R is high and S is low |
| Answer» C. | |
| 160. |
For NOR gate SR flip-flop, the 'no change' condition is |
| A. | S = 0, R = 0 |
| B. | S = 1, R = 0 |
| C. | S = 0, R = 1 |
| D. | S = 1, R = 1 |
| Answer» B. S = 1, R = 0 | |
| 161. |
Available multiplexer IC package can have a maximum of 8 inputs. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 162. |
Assertion (A): In a BCD to 7 segment decoder the number of outputs active at one time is always the same.Reason (R): A decoder can be used to interface BCD input to LED display. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |
| 163. |
A 4 bit DAC gives an output of 4.5 V for input of 1001. If input is 0110, the output is |
| A. | 1.5 V |
| B. | 2.0 V |
| C. | 3.0 V |
| D. | 4.5 V |
| Answer» D. 4.5 V | |
| 164. |
For the logic circuit shown in figure, the simplified Boolean expression for the output Y is |
| A. | A + B + C |
| B. | AB |
| C. | B |
| D. | C |
| Answer» C. B | |
| 165. |
In 8086 microprocessor, if the segment register contains 1 FAB and IP register contains 10AI, the effective memory address is |
| A. | 20B51 |
| B. | 304C |
| C. | FBC0 |
| D. | FDB5 |
| Answer» B. 304C | |
| 166. |
What is the purpose of using ALE signal high? |
| A. | To latch low order address from bus to separate A0 - A7 lines |
| B. | To latch data D0 - D7 from bus to separate data bus |
| C. | To disable data bus latch |
| D. | All of the above |
| Answer» B. To latch data D0 - D7 from bus to separate data bus | |
| 167. |
If the inputs to a 3 bit binary adder are 1112 and 1112, the output will be 1102 |
| A. | 1 |
| B. | |
| Answer» C. | |
| 168. |
If we need a device to shut off a few ampere current in a few nano seconds, the proper devices is |
| A. | VMOS |
| B. | CMOS |
| C. | BJT |
| D. | UJT |
| Answer» B. CMOS | |
| 169. |
The 54/74164 chip is an 8-bit serial-input-parallel-output shift register. The clock is 1 MHz. The time needed to shift a 8-bit binary number into the chip is |
| A. | 1 μs |
| B. | 2 μs |
| C. | 8 μs |
| D. | 16 μs |
| Answer» D. 16 Œºs | |
| 170. |
Words having 8 bits are to be stored into computer memory. The number of lines required for writing into memory are |
| A. | 1 |
| B. | 2 |
| C. | 4 |
| D. | 8 |
| Answer» E. | |
| 171. |
Race condition always arises in |
| A. | synchronous circuit |
| B. | asynchronous circuit |
| C. | combinational circuit |
| D. | digital circuit |
| Answer» C. combinational circuit | |
| 172. |
The clock shown in figure has a frequency of 6 MHz. The frequency of the Q output will be |
| A. | 12 MHz |
| B. | 24 MHz |
| C. | 3 MHz |
| D. | 1.5 MHz |
| Answer» D. 1.5 MHz | |
| 173. |
The Boolean function/implemented in the figure using two I/P multiplexers is |
| A. | ABC + ABC |
| B. | ABC + AB C |
| C. | ABC + ABC |
| D. | ABC + AB C |
| Answer» B. ABC + AB C | |
| 174. |
In the given figure, the flip flop is |
| A. | negative edge triggered |
| B. | positive edge triggered |
| C. | level triggered |
| D. | either (a) or (c) |
| Answer» B. positive edge triggered | |
| 175. |
Which of the following ICs has only one NAND gate? |
| A. | 7410 |
| B. | 7420 |
| C. | 7430 |
| D. | 7447 |
| Answer» D. 7447 | |
| 176. |
In INHIBIT operation |
| A. | output is 1 when both inputs are 0 |
| B. | output is 0 when blocking input is 1 |
| C. | output is 0 when blocking input is 0 |
| D. | output is 1 when blocking input is either 0 or 1 |
| Answer» C. output is 0 when blocking input is 0 | |
| 177. |
In a 4 bit weighted resistor D/A converter, resistor value corresponding to LSB is 32 k ohm. The resistor value corresponding to MSB is |
| A. | 32 k ohm |
| B. | 16 k ohm |
| C. | 8 k ohm |
| D. | 4 k ohm |
| Answer» E. | |
| 178. |
ALU processes |
| A. | decimal numbers |
| B. | binary numbers |
| C. | hexadecimal numbers |
| D. | all of the above |
| Answer» C. hexadecimal numbers | |
| 179. |
1001012 is equal to decimal number |
| A. | 47 |
| B. | 37 |
| C. | 21 |
| D. | 17 |
| Answer» C. 21 | |
| 180. |
If a RAM has 34 bits in its MAR and 16 bits in its MDR, then its capacity will be |
| A. | 32 GB |
| B. | 16 GB |
| C. | 32 MB |
| D. | 16 MB |
| Answer» B. 16 GB | |
| 181. |
The SID data received is |
| A. | LSB first |
| B. | LSB last |
| C. | 1 |
| D. | none of these |
| Answer» B. LSB last | |
| 182. |
The contents of stack location after the call operation will be |
| A. | 111 |
| B. | 1110 |
| C. | 1010 |
| D. | 1111 |
| Answer» B. 1110 | |
| 183. |
The resolution of a 12-bit D/A converter using a binary ladder with + 10V as the full scale output will be |
| A. | 2.44 mV |
| B. | 3.50 mV |
| C. | 4.32 mV |
| D. | 5.12 mV |
| Answer» B. 3.50 mV | |
| 184. |
The advantage of using dual slope ADC in digital voltmeter is that |
| A. | its conversion time is small |
| B. | its accuracy is high |
| C. | its output is in BCD |
| D. | it does not require a comparator |
| Answer» C. its output is in BCD | |
| 185. |
In 8085 microprocessor, how many interrupt control lines are there? |
| A. | 12 |
| B. | 16 |
| Answer» C. | |
| 186. |
For the K map of the given figure, the simplified Boolean expression is |
| A. | A C + A D + ABC |
| B. | A B D + BC |
| C. | A C D + AC |
| D. | A C D + AC + BC |
| Answer» B. A B D + BC | |
| 187. |
Assertion (A): Different symbols are used for different gatesReason (R): IEEE symbols are the same as traditional symbols for gates. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» D. A is false, R is true | |
| 188. |
Binary 1111 when subtracted from binary 11111 is |
| A. | 101110 |
| B. | 10110 |
| C. | 10000 |
| D. | 100010 |
| Answer» B. 10110 | |
| 189. |
The resolution of 4 bit counting ADC is 0.5 volt, for an Analog input of 6.6 volts. The digital output of ADC will be |
| A. | 1100 |
| B. | 1110 |
| Answer» C. | |
| 190. |
If the number of information bits is m, the number of parity bits p in the Hamming code is given by equation |
| A. | 2p = m + p + 1 |
| B. | 2p ‚â• m + p + 1 |
| C. | 2P = m + p |
| D. | 2p ‚â• m + p |
| Answer» C. 2P = m + p | |
| 191. |
Which converters uses integrating op-amp? |
| A. | Parallel A/D converter |
| B. | Single slope A/D converter |
| C. | Dual slope A/D converter |
| D. | Both (b) and (c) |
| Answer» D. Both (b) and (c) | |
| 192. |
Shift left and shift right operations occur in a calculator. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 193. |
Assertion (A): TTL uses multiple emitter transistor.Reason (R): Multiple emitter transistors with about 60 emitters have been developed. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 194. |
VF glows with __________ colour when activated. |
| A. | Red |
| B. | Orange |
| C. | Bluish green |
| D. | none of these |
| Answer» D. none of these | |
| 195. |
The counter shown in the given figure is built using 4 -ve edge triggered toggle FFs. The FF can be set asynchronously when R = 0. The combinational logic required to realize a modulo-13 counter is |
| A. | F = Q4 Q3 Q2 Q1 |
| B. | F = Q4 + Q3 + Q2 + Q1 |
| C. | F = Q4 + Q3 + Q2 + Q1 |
| D. | F = Q4Q3Q2Q1 |
| Answer» B. F = Q4 + Q3 + Q2 + Q1 | |
| 196. |
Decimal 17 in octal system is represented by |
| A. | 888 |
| B. | 111 |
| C. | 21 |
| D. | 27 |
| Answer» D. 27 | |
| 197. |
Assertion (A): Power drain of CMOS increases with operating frequency Reason (R): All unused CMOS inputs should be tied either to a fixed voltage level (0 or VDD) or to another input. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 198. |
Which memory is available in all technologies? |
| A. | PROM |
| B. | EEPROM |
| C. | ROM |
| D. | EPROM |
| Answer» B. EEPROM | |
| 199. |
The number of inputs and outputs in a full adder are |
| A. | 2 and 1 |
| B. | 2 and 2 |
| C. | 3 and 3 |
| D. | 3 and 2 |
| Answer» E. | |
| 200. |
What binary number does second row represent? |
| A. | 1111001 |
| B. | 1010101 |
| C. | 10101010 |
| D. | 11101010 |
| Answer» E. | |