MCQOPTIONS
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MCQOPTIONS
This section includes 2171 Mcqs, each offering curated multiple-choice questions to sharpen your ENGINEERING SERVICES EXAMINATION (ESE) knowledge and support exam preparation. Choose a topic below to get started.
| 501. |
For the logic circuit given, what is the simplified Boolean function? |
| A. | X = AB + C |
| B. | X = BC + A |
| C. | X = AB + AC |
| D. | X = AC + B |
| Answer» C. X = AB + AC | |
| 502. |
In the NMOS inverter |
| A. | the driver and achieve load are enhancement type |
| B. | the driver is enhancement type and load depletion type |
| C. | both driver and load are depletion type |
| D. | the driver and load are depletion type |
| Answer» C. both driver and load are depletion type | |
| 503. |
2's complement representation of a 16 bit number (one sign bit and 15 magnitude bit) is FFFF. Its magnitude in decimal representation is |
| A. | 0 |
| B. | 1 |
| C. | 32676 |
| D. | 65, 535 |
| Answer» C. 32676 | |
| 504. |
The circuit realizes the function |
| A. | (A + B) E + CD |
| B. | (A + B) (E + CD) |
| C. | (A + B) (E + C + D) |
| D. | (AB + E). CD |
| Answer» B. (A + B) (E + CD) | |
| 505. |
TTL logic is preferred to DRL logic because |
| A. | greater fan-out is possible |
| B. | greater logic levels are possible |
| C. | greater fan-in is possible |
| D. | less power consumption is achieve |
| Answer» B. greater logic levels are possible | |
| 506. |
It is desired to clean up ragged looking pulsed that have been distorted during transmission from one place to another, which of the following device will be appropriate? |
| A. | Multiplexer |
| B. | D/A converter |
| C. | JK flip-flop |
| D. | Schmitt trigger |
| Answer» E. | |
| 507. |
In a flip-flop with a NAND latch, a low R and a low S produces |
| A. | active condition |
| B. | inactive condition |
| C. | race condition |
| D. | dead condition |
| Answer» D. dead condition | |
| 508. |
The fetching, decoding and executing of an instruction is broken down into several time intervals. Each of these intervals, involving one or more clock periods, is called a |
| A. | instruction cycle |
| B. | machine cycle |
| C. | process cycle |
| D. | none of the above |
| Answer» C. process cycle | |
| 509. |
The logic circuit in the given figure realizes the function |
| A. | A |
| B. | B |
| C. | C |
| D. | D |
| Answer» E. | |
| 510. |
An OR gate has 4 inputs. One input is high and the other three are low. The output |
| A. | is low |
| B. | is high |
| C. | is alternately high and low |
| D. | may be high or low depending on relative magnitude of inputs |
| Answer» C. is alternately high and low | |
| 511. |
In a 7 segment LED display, the minimum number of segments is activated when the input decimal number is |
| A. | 0 |
| B. | 1 |
| C. | 2 |
| D. | 3 |
| Answer» C. 2 | |
| 512. |
If the ladder reference voltage is 2 V, then minimum comparator resolution required is |
| A. | 0.125 V |
| B. | 1.25 V |
| C. | 12.5 V |
| D. | 0 |
| Answer» B. 1.25 V | |
| 513. |
The no. of FF required and the maximum decimal no. of a MOD-12 counter is |
| A. | 12, 12 |
| B. | 4, 11 |
| C. | 3, 6 |
| D. | 4, 10 |
| Answer» C. 3, 6 | |
| 514. |
Which has the highest power dissipation per gate? |
| A. | ECL |
| B. | TTL |
| C. | CMOS |
| D. | PMOS |
| Answer» B. TTL | |
| 515. |
Inverter 74 LS04 has following specifications I0H max = - 0.4 mA, I0L max = 8 mA, IIH max = 20 μA, IIL max = 0.1 mAThe fan out of this inverter is |
| A. | 10 |
| B. | 20 |
| C. | 60 |
| D. | 100 |
| Answer» C. 60 | |
| 516. |
Which of these is the most recent display device? |
| A. | LED |
| B. | LCD |
| C. | VF |
| D. | (a) and (c) |
| Answer» D. (a) and (c) | |
| 517. |
What do the contents of instruction register specify? |
| A. | Operand for the instruction being executed |
| B. | Op code for the instruction being executed |
| C. | Op code for the instruction to be executed next |
| D. | Operand for the instruction to be executed next |
| Answer» C. Op code for the instruction to be executed next | |
| 518. |
ECL is a saturating logic. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» C. May be True or False | |
| 519. |
PROM is |
| A. | Permanent Read Only Memory |
| B. | Polarized Read Only Memory |
| C. | Positive Read Only Memory |
| D. | Programmable Read Only Memory |
| Answer» E. | |
| 520. |
A 2 bit BCD D/A converter is a weighted resistor type with ER = 1V, R = 1 MΩ and Rf = 10KΩ then Resolution in percent and volt is __________ . |
| A. | 1%, 1 mv |
| B. | 10%, 10 mv |
| C. | 10%, 1 mv |
| D. | 1%, 10 mv |
| Answer» E. | |
| 521. |
In D-type FF, Preset (Pr) and clear (Clr) inputs are called |
| A. | Synchronous |
| B. | Asynchronous |
| C. | Data |
| D. | None |
| Answer» C. Data | |
| 522. |
If all bubbles are removed, what are the new RAM locations?The 8156 of a figure has RAM locations from 2000 H to 20 FFH. |
| A. | (8000)H - (83FF)H |
| B. | (80AA)H - (80FF)H |
| C. | (FF00)H - (FFFF)H |
| D. | none of the above |
| Answer» D. none of the above | |
| 523. |
To convert JK flip flop to D flip flop |
| A. | connect D to both J and K |
| B. | connect D to J directly and D to K through inverter |
| C. | connect D to K directly and D to J through inverter |
| D. | connect D to K and leave J open |
| Answer» C. connect D to K directly and D to J through inverter | |
| 524. |
Shift left and shift right operations occur in a calculator. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» B. False | |
| 525. |
Schmitt trigger can be used as a |
| A. | comparator |
| B. | square-wave generator |
| C. | flip-flop |
| D. | all of these |
| Answer» E. | |
| 526. |
In decimal system the base of radix is |
| A. | 0 |
| B. | 1 |
| C. | 10 |
| D. | e |
| Answer» D. e | |
| 527. |
A device that converts from decimal to binary numbered is called |
| A. | decoder |
| B. | encoder |
| C. | CPU |
| D. | converter |
| Answer» C. CPU | |
| 528. |
Flash ADC is |
| A. | serial ADC |
| B. | parallel ADC |
| C. | series-parallel ADC |
| D. | successive approximation ADC |
| Answer» C. series-parallel ADC | |
| 529. |
If 4 in binary system is 100 then 8 will be |
| A. | 10 |
| B. | 100 |
| C. | 111 |
| D. | 1000 |
| Answer» E. | |
| 530. |
Decimal number 5436 when converted into 9's complement will become |
| A. | 4356 |
| B. | 4653 |
| C. | 4563 |
| D. | 4655 |
| Answer» D. 4655 | |
| 531. |
What will be maximum input that can be converted for a 6 bit dual slope A/D converter uses a reference of -6v and a 1 MHz clock. It uses a fixed count of 40 (101000). |
| A. | 9 V |
| B. | 9.45 |
| C. | 10 V |
| D. | 8 V |
| Answer» C. 10 V | |
| 532. |
In floating point representation the number of bits in exponent is |
| A. | 8 |
| B. | 7 |
| C. | 6 |
| D. | 5 |
| Answer» D. 5 | |
| 533. |
Microprocessors find applications in |
| A. | pocket calculators |
| B. | scientific instruments |
| C. | medical equipments |
| D. | all of the above |
| Answer» E. | |
| 534. |
A 4 bit modulo 16 ripple counter uses JK flip-flops. If the propagation delay of each FF is 50 ns. The max. clock frequency that can be used is equal to |
| A. | 20 MHz |
| B. | 10 MHz |
| C. | 5 MHz |
| D. | 4 MHz |
| Answer» D. 4 MHz | |
| 535. |
The hexadecimal number given below represent decimal numbers which are multiples of DC, C8, BE, 46, IE |
| A. | 2 |
| B. | 6 |
| C. | 7 |
| D. | 10 |
| Answer» D. 10 | |
| 536. |
The SID data received is |
| A. | LSB first |
| B. | LSB last |
| C. | 1 |
| D. | none of these |
| Answer» B. LSB last | |
| 537. |
The number of unused states in a 4 bit Johnson counter is |
| A. | 2 |
| B. | 4 |
| C. | 8 |
| D. | 12 |
| Answer» D. 12 | |
| 538. |
What are the contents of the accumulator after the RIC has been executed? |
| A. | 40 H |
| B. | 41 H |
| C. | 42 H |
| D. | 43 D |
| Answer» E. | |
| 539. |
D FF can be used as a |
| A. | differentiator |
| B. | divider circuit |
| C. | delay switch |
| D. | none |
| Answer» D. none | |
| 540. |
The binary addition 1 + 1 = |
| A. | 11 |
| B. | 10 |
| C. | 111 |
| D. | 100 |
| Answer» C. 111 | |
| 541. |
Binary number 11001 is equivalent to decimal number |
| A. | 35 |
| B. | 15 |
| C. | 105 |
| D. | 25 |
| Answer» E. | |
| 542. |
Assertion (A): In hybrid digital circuits the problem of logic race can occur.Reason (R): In two level logic there is no problem of logic race. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 543. |
The disadvantage of counter type ADC as compared to comparator ADC is that |
| A. | resolution is low |
| B. | conversion time is more |
| C. | circuit is more complex |
| D. | stability is low |
| Answer» B. conversion time is more | |
| 544. |
1101₂ - 1001₂ = |
| A. | 1000 |
| B. | 0100 |
| C. | 0010 |
| D. | 0001 |
| Answer» C. 0010 | |
| 545. |
If the inputs to a 3 bit binary adder are 111₂ and 111₂, the output will be 110₂ |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» C. May be True or False | |
| 546. |
Two numbers in excess-3 code are added and the result is less than 8. To get equivalent binary |
| A. | 0011 is subtracted |
| B. | 0011 is added |
| C. | 0110 is subtracted |
| D. | 0110 is added |
| Answer» D. 0110 is added | |
| 547. |
For an N bit ADC, the percentage resolution is [1/2ᴺ - 1)] 100. |
| A. | True |
| B. | False |
| C. | May be True or False |
| D. | Can't say |
| Answer» B. False | |
| 548. |
An A/D converter uses for reference purposes |
| A. | DC voltage |
| B. | a saw tooth generator |
| C. | set of keys |
| D. | a flip-flop |
| Answer» C. set of keys | |
| 549. |
Which of the following is susceptible to race condition? |
| A. | R-S latch |
| B. | D latch |
| C. | Both R - S and D latches |
| D. | None of the above |
| Answer» B. D latch | |
| 550. |
Quantization error occurs in |
| A. | D/A converter |
| B. | A/D converter |
| C. | both D/A and A/D converter |
| D. | neither D/A nor A/D converter |
| Answer» C. both D/A and A/D converter | |