MCQOPTIONS
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MCQOPTIONS
This section includes 31 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
A binary-weighted digital-to-analog converter has a feedback resistor, R, of 12 k. If 50 A of current is through the resistor, the voltage out of the circuit is: |
| A. | 0.6 V |
| B. | –0.6 V |
| C. | 0.1 V |
| D. | –0.1 V |
| Answer» C. 0.1 V | |
| 2. |
The resolution of a 0–5 V 6-bit digital-to-analog converter (DAC) is: |
| A. | 63% |
| B. | 64% |
| C. | 1.56% |
| D. | 15.6% |
| Answer» D. 15.6% | |
| 3. |
An 8-bit digital-to-analog converter (DAC) has a resolution of 0.125 V. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 4. |
A binary-weighted resistor used in a digital-to-analog converter (DAC) is only practical up to a resolution of ________. |
| A. | 10 bits |
| B. | 2 bits |
| C. | 8 bits |
| D. | 4 bits |
| Answer» E. | |
| 5. |
The key advantage of the successive approximation analog-to-digital converter (ADC) is its conversion speed. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 6. |
One way to determine the resolution of a digital-to-analog converter (DAC) is to compare the ratio of one step voltage to the maximum output voltage. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 7. |
Inaccurate analog-to-digital conversion may be due to ____________. |
| A. | constant analog input voltage |
| B. | linear ramp usage |
| C. | intermittent counter inputs |
| D. | faulty sample-and-hold circuitry |
| Answer» E. | |
| 8. |
In a binary-weighted digital-to-analog converter (DAC), the values of the input resistors are chosen to be proportional to the binary weights of the corresponding input bits. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 9. |
Which is not an analog-to-digital (ADC) conversion error? |
| A. | differential nonlinearity |
| B. | missing code |
| C. | incorrect code |
| D. | offset |
| Answer» B. missing code | |
| 10. |
A binary-weighted digital-to-analog converter has a feedback resistor, Rf, of 12 k. If 50 A of current is through the resistor, the voltage out of the circuit is: |
| A. | 0.6 V |
| B. | –0.6 V |
| C. | 0.1 V |
| D. | –0.1 V |
| Answer» C. 0.1 V | |
| 11. |
The number of binary bits at the input of a digital-to-analog converter (DAC) is known as ________. |
| A. | accuracy |
| B. | linearity |
| C. | resolution |
| D. | monotonicity |
| Answer» D. monotonicity | |
| 12. |
Incorrect codes are a form of output error for a digital-to-analog converter (DAC). |
| A. | 1 |
| B. | |
| Answer» C. | |
| 13. |
The characteristic that a change of one binary step on the input of a digital-to-analog converter (DAC) should cause exactly one step change on the output is called ________. |
| A. | resolution |
| B. | monotonicity |
| C. | linearity |
| D. | accuracy |
| Answer» C. linearity | |
| 14. |
The primary disadvantage of the flash analog-to digital converter (ADC) is that: |
| A. | it requires the input voltage to be applied to the inputs simultaneously |
| B. | a long conversion time is required |
| C. | a large number of output lines is required to simultaneously decode the input voltage |
| D. | a large number of comparators is required to represent a reasonable sized binary number |
| Answer» E. | |
| 15. |
A digital-to-analog converter (DAC) is said to be nonmonotonic if the magnitude of the output voltage increases every time the input code increases. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 16. |
The resolution of a 0–5 V 6-bit digital-to-analog converter (DAC) is: |
| A. | 0.63 |
| B. | 0.64 |
| C. | 0.0156 |
| D. | 0.156 |
| Answer» D. 0.156 | |
| 17. |
The flash method of analog-to-digital conversion (ADC) uses comparators that compare reference voltages with the analog input voltage. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 18. |
Sample-and-hold circuits in analog-to digital converters (ADCs) are designed to: |
| A. | sample and hold the output of the binary counter during the conversion process |
| B. | stabilize the comparator's threshold voltage during the conversion process |
| C. | stabilize the input analog signal during the conversion process |
| D. | sample and hold the D/A converter staircase waveform during the conversion process |
| Answer» D. sample and hold the D/A converter staircase waveform during the conversion process | |
| 19. |
The relative accuracy of a digital-to-analog converter (DAC) is determined by settling time. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» C. 1 | |
| 20. |
If we double the number of bits in our digital representation of a number from 4 to 8 bits, we double the relative accuracy of the conversion from digital to analog. |
| A. | 1 |
| B. | |
| Answer» C. | |
| 21. |
What is the major advantage of the R/2R ladder digital-to-analog (DAC), as compared to a binary-weighted digital-to-analog DAC converter? |
| A. | It only uses two different resistor values. |
| B. | It has fewer parts for the same number of inputs. |
| C. | Its operation is much easier to analyze. |
| D. | The virtual ground is eliminated and the circuit is therefore easier to understand and troubleshoot. |
| Answer» B. It has fewer parts for the same number of inputs. | |
| 22. |
________ analog-to-digital converters (ADCs) have a fixed value of conversion time that is not dependent on the value of the analog input. |
| A. | Substandard |
| B. | Dual |
| C. | Recessive approximation |
| D. | Successive approximation |
| Answer» E. | |
| 23. |
The problems of the binary-weighted resistor digital-to-analog converter (DAC) can be overcome by using ___________. |
| A. | an 8-bit binary-weighted resistor DAC |
| B. | an R/2R ladder DAC |
| C. | a staircase DAC |
| D. | a flash DAC |
| Answer» C. a staircase DAC | |
| 24. |
The difference between analog voltage represented by two adjacent digital codes, or the analog step size, is the: |
| A. | quantization |
| B. | accuracy |
| C. | resolution |
| D. | monotonicity |
| Answer» D. monotonicity | |
| 25. |
A binary-weighted digital-to-analog converter has an input resistor of 100 k. If the resistor is connected to a 5 V source, the current through the resistor is: |
| A. | 50 A |
| B. | 5 mA |
| C. | 500 A |
| D. | 50 mA |
| Answer» B. 5 mA | |
| 26. |
What is the resolution of a digital-to-analog converter (DAC)? |
| A. | It is the comparison between the actual output of the converter and its expected output. |
| B. | It is the deviation between the ideal straight-line output and the actual output of the converter. |
| C. | It is the smallest analog output change that can occur as a result of an increment in the digital input. |
| D. | It is its ability to resolve between forward and reverse steps when sequenced over its entire range. |
| Answer» D. It is its ability to resolve between forward and reverse steps when sequenced over its entire range. | |
| 27. |
________ analog-to-digital converters (ADCs) use no clock signal, because there is no timing or sequencing required. |
| A. | Actuator |
| B. | Dual |
| C. | Flash |
| D. | Bipolar |
| Answer» D. Bipolar | |
| 28. |
A 4-bit R/2R digital-to-analog (DAC) converter has a reference of 5 volts. What is the analog output for the input code 0101. |
| A. | 0.3125 V |
| B. | 3.125 V |
| C. | 0.78125 V |
| D. | –3.125 V |
| Answer» C. 0.78125 V | |
| 29. |
In a flash analog-to-digital converter, the output of each comparator is connected to an input of a: |
| A. | decoder |
| B. | priority encoder |
| C. | multiplexer |
| D. | demultiplexer |
| Answer» C. multiplexer | |
| 30. |
A sample-and-hold circuit samples an analog value and holds it long enough for the analog-to-digital conversion to occur. |
| A. | 1 |
| B. | |
| C. | 1 |
| D. | |
| Answer» B. | |
| 31. |
Which of the following is a type of error associated with digital-to-analog converters (DACs)? |
| A. | nonmonotonic error |
| B. | incorrect output codes |
| C. | offset error |
| D. | nonmonotonic and offset error |
| Answer» E. | |