MCQOPTIONS
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| 1. |
Sample-and-hold circuits in analog-to digital converters (ADCs) are designed to: |
| A. | sample and hold the output of the binary counter during the conversion process |
| B. | stabilize the comparator's threshold voltage during the conversion process |
| C. | stabilize the input analog signal during the conversion process |
| D. | sample and hold the D/A converter staircase waveform during the conversion process |
| Answer» D. sample and hold the D/A converter staircase waveform during the conversion process | |