Explore topic-wise MCQs in Vlsi.

This section includes 19 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.

1.

Oxide breakdown occurs due to

A. electrostatic charge
B. threshold voltage
C. voltage shift
D. poor input/output pad circuitry
Answer» E.
2.

Hot carrier injection causes

A. threshold voltage shift
B. transconductance degradation
C. threshold voltage shift & transconductance degradation
D. none of the mentioned
Answer» D. none of the mentioned
3.

_____ of faults are easier to detect.

A. 50%
B. 60%
C. 70%
D. 80%
Answer» E.
4.

Test pattern generation is assisted using

A. automatic test pattern generator
B. exhaustive pattern generator
C. repeated pattern generator
D. loop pattern generator
Answer» B. exhaustive pattern generator
5.

______ of the area is dedicated for testability.

A. 20%
B. 10%
C. 30%
D. 25%
Answer» D. 25%
6.

Circuit nodes cannot be probed for monitoring or excitation.

A. true
B. false
Answer» B. false
7.

______OF_FAULTS_ARE_EASIER_TO_DETECT?$

A. 50%
B. 60%
C. 70%
D. 80%
Answer» E.
8.

Oxide breakdown occurs due to$

A. electrostatic charge
B. threshold voltage
C. voltage shift
D. poor input/output pad circuitry
Answer» E.
9.

Hot carrier injection causes$

A. threshold voltage shift
B. transconductance degradation
C. both of the mentioned
D. none of the mentioned
Answer» D. none of the mentioned
10.

Which model is used for pc board testing?

A. stuck at
B. stuck in
C. stuck on
D. stuck through
Answer» B. stuck in
11.

Test pattern generation is assisted usin?

A. automatic test pattern generator
B. exhaustive pattern generator
C. repeated pattern generator
D. loop pattern generator
Answer» B. exhaustive pattern generator
12.

What are the dominant faults in diffusion layers?

A. short citcuit faults
B. open circuit faults
C. short and open circuit faults
D. power supply faults
Answer» B. open circuit faults
13.

After partitioning, number of vectors is given by

A. 2<sup>(m+n)</sup>
B. 2<sup>((m+n)/2)</sup>
C. 2<sup>n </sup>+ 2<sup>m</sup>
D. 2<sup>2</sup>(m+n)
Answer» D. 2<sup>2</sup>(m+n)
14.

The number of test vectors for exhaustive testing is calculated by

A. 2<sup>(m+n)</sup>
B. 2<sup>((m+n)/2)</sup>
C. 2<sup>(m-n)</sup>
D. 2<sup>2(m+n)</sup>
Answer» B. 2<sup>((m+n)/2)</sup>
15.

In prototype testing, the circuits are

A. open circuited
B. short circuited
C. tested as a whole circuit
D. programmed
Answer» B. short circuited
16.

Partitioning into subsystems are done at

A. design stage
B. prototype stage
C. testing stage
D. fabrication stage
Answer» C. testing stage
17.

______ of the area is dedicated for testability

A. 20%
B. 10%
C. 30%
D. 25%
Answer» D. 25%
18.

The circuit should be tested at

A. design level
B. chip level
C. transistor level
D. switch level
Answer» C. transistor level
19.

Circuit nodes cannot be probed for monotoring or excitation.

A. true
B. false
Answer» B. false