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This section includes 2291 Mcqs, each offering curated multiple-choice questions to sharpen your Engineering knowledge and support exam preparation. Choose a topic below to get started.
751. |
The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses? |
A. | 0000 |
B. | 0010 |
C. | 1000 |
D. | 1111 |
Answer» D. 1111 | |
752. |
What is a shift register that will accept a parallel input, or a bidirectional serial load and internal shift features, called? |
A. | tristate |
B. | end around |
C. | universal |
D. | conversion |
Answer» D. conversion | |
753. |
A half-adder circuit would normally be used each time a carry input is required in an added circuit. |
A. | True |
B. | False |
Answer» C. | |
754. |
If B[7..0] = 10100101, what is the value of B[6..2]? |
A. | 10100 |
B. | 01001 |
C. | 10010 |
D. | 00101 |
Answer» C. 10010 | |
755. |
What is the most important operation in binary-coded decimal (BCD) arithmetic? |
A. | addition |
B. | subtraction |
C. | multiplication |
D. | division |
Answer» B. subtraction | |
756. |
The range of positive numbers when using an eight-bit two's-complement system is: |
A. | 0 to 64 |
B. | 0 to 100 |
C. | 0 to 127 |
D. | 0 to 256 |
Answer» D. 0 to 256 | |
757. |
What are the two types of basic adder circuits? |
A. | sum and carry |
B. | half-adder and full-adder |
C. | asynchronous and synchronous |
D. | one- and two's-complement |
Answer» C. asynchronous and synchronous | |
758. |
Using 4-bit adders to create a 1See Section 6-bit adder: |
A. | requires 16 adders. |
B. | requires 4 adders. |
C. | requires the carry-out of the less significant adder to be connected to the carry-in of the next significant adder. |
D. | requires 4 adders and the connection of the carry out of the less significant adder to the carry-in of the next significant adder. |
Answer» E. | |
759. |
When performing subtraction by addition in the 2's-complement system: |
A. | the minuend and the subtrahend are both changed to the 2's-complement. |
B. | the minuend is changed to 2's-complement and the subtrahend is left in its original form. |
C. | the minuend is left in its original form and the subtrahend is changed to its 2's-complement. |
D. | the minuend and subtrahend are both left in their original form. |
Answer» D. the minuend and subtrahend are both left in their original form. | |
760. |
The two's-complement system is to be used to add the signed numbers 11110010 and 11110011. Determine, in decimal, the sign and value of each number and their sum. |
A. | 14 and 13, 27 |
B. | 113 and 114, 227 |
C. | 27 and 13, 40 |
D. | 11 and 16, 27 |
Answer» B. 113 and 114, 227 | |
761. |
When 1100010 is divided by 0101, what is the decimal remainder? |
A. | 2 |
B. | 3 |
C. | 4 |
D. | 6 |
Answer» C. 4 | |
762. |
|
A. | 10011110 |
B. | 01211110 |
C. | 000100000100 |
D. | 001000001000 |
Answer» D. 001000001000 | |
763. |
The most commonly used system for representing signed binary numbers is the: |
A. | 2's-complement system. |
B. | 1's-complement system. |
C. | 10's-complement system. |
D. | sign-magnitude system. |
Answer» B. 1's-complement system. | |
764. |
What is the major difference between half-adders and full-adders? |
A. | Nothing basically; full-adders are made up of two half-adders. |
B. | Full adders can handle double-digit numbers. |
C. | Full adders have a carry input capability. |
D. | Half adders can handle only single-digit numbers. |
Answer» D. Half adders can handle only single-digit numbers. | |
765. |
If a 10-bit ring counter has an initial state 1101000000, what is the state after the second clock pulse? |
A. | 1101000000 |
B. | 0011010000 |
C. | 1100000000 |
D. | 0000000000 |
Answer» C. 1100000000 | |
766. |
How much storage capacity does each stage in a shift register represent? |
A. | One bit |
B. | Two bits |
C. | Four bits (one nibble) |
D. | Eight bits (one byte) |
Answer» B. Two bits | |
767. |
Convert each of the decimal numbers to 8-bit two's-complement form and then perform subtraction by taking the two's-complement and adding. |
A. | 0001 0011 |
B. | 0000 1110 |
C. | 0010 1110 |
D. | 1110 0000 |
Answer» C. 0010 1110 | |
768. |
Adding in binary, a decimal 26 + 27 will produce a sum of: |
A. | 111010 |
B. | 110110 |
C. | 110101 |
D. | 101011 |
Answer» D. 101011 | |
769. |
Convert each of the following signed binary numbers (two's-complement) to a signed decimal number.00000101 11111100 11111000 |
A. | 5 +4 +8 |
B. | +5 4 8 |
C. | 5 +252 +248 |
D. | +5 252 248 |
Answer» C. 5 +252 +248 | |
770. |
How many basic binary subtraction operations are possible? |
A. | 4 |
B. | 3 |
C. | 2 |
D. | 1 |
Answer» B. 3 | |
771. |
Fast-look-ahead carry circuits found in most 4-bit full-adder circuits: |
A. | determine sign and magnitude |
B. | reduce propagation delay |
C. | add a 1 to complemented inputs |
D. | increase ripple delay |
Answer» C. add a 1 to complemented inputs | |
772. |
Add the following hexadecimal numbers. 3C &nbsp 14 &nbsp 3B +25 &nbsp +28 &nbsp +DC |
A. | 60 3C 116 |
B. | 62 3C 118 |
C. | 61 3C 117 |
D. | 61 3D 117 |
Answer» D. 61 3D 117 | |
773. |
What are constants in VHDL code? |
A. | Fixed numbers represented by a name |
B. | Fixed variables used in functions |
C. | Fixed number types |
D. | Constants do not exist in VHDL code. |
Answer» B. Fixed variables used in functions | |
774. |
When the output of a tristate shift register is disabled, the output level is placed in a: |
A. | float state |
B. | LOW state |
C. | high-impedance state |
D. | float or high-impedance state |
Answer» E. | |
775. |
Another way to connect devices to a shared data bus is to use a ________. |
A. | circulating gate |
B. | transceiver |
C. | bidirectional encoder |
D. | strobed latch |
Answer» C. bidirectional encoder | |
776. |
To serially shift a nibble (four bits) of data into a shift register, there must be ________. |
A. | one clock pulse |
B. | four clock pulses |
C. | eight clock pulses |
D. | one clock pulse for each 1 in the data |
Answer» C. eight clock pulses | |
777. |
Computers operate on data internally in a ________ format. |
A. | tristate |
B. | universal |
C. | parallel |
D. | serial |
Answer» D. serial | |
778. |
In a 4-bit Johnson counter sequence there are a total of how many states, or bit patterns? |
A. | 1 |
B. | 2 |
C. | 4 |
D. | 8 |
Answer» E. | |
779. |
What are the three output conditions of a three-state buffer? |
A. | HIGH, LOW, float |
B. | 1, 0, float |
C. | both of the above |
D. | neither of the above |
Answer» D. neither of the above | |
780. |
The primary purpose of a three-state buffer is usually: |
A. | to provide isolation between the input device and the data bus |
B. | to provide the sink or source current required by any device connected to its output without loading down the output device |
C. | temporary data storage |
D. | to control data flow |
Answer» B. to provide the sink or source current required by any device connected to its output without loading down the output device | |
781. |
What is a recirculating register? |
A. | serial out connected to serial in |
B. | all |
C. | <i>Q</i> |
D. | outputs connected together |
E. | a register that can be used over again |
Answer» B. all | |
782. |
When is it important to use a three-state buffer? |
A. | when two or more outputs are connected to the same input |
B. | when all outputs are normally HIGH |
C. | when all outputs are normally LOW |
D. | when two or more outputs are connected to two or more inputs |
Answer» B. when all outputs are normally HIGH | |
783. |
How would a latch circuit be used in a microprocessor system? |
A. | as transportation for Intel employees |
B. | for a group of data that is the same |
C. | as a set of common connections for transfer of data |
Answer» D. | |
784. |
What is the principal advantage of using address multiplexing with DRAM memory? |
A. | reduced memory access time |
B. | reduced requirement for constant refreshing of the memory contents |
C. | reduced pin count and decrease in package size |
D. | It eliminates the requirement for a chip-select input line, thereby reducing the pin count. |
Answer» D. It eliminates the requirement for a chip-select input line, thereby reducing the pin count. | |
785. |
On a CD-ROM, ________ are raised areas representing a 1. |
A. | mounds |
B. | lands |
C. | holes |
D. | pits |
Answer» C. holes | |
786. |
The location of a unit of data in a memory array is called its ________. |
A. | storage |
B. | RAM |
C. | address |
D. | data |
Answer» D. data | |
787. |
How many address bits are required for a 4096-bit memory organized as a 512 8 memory? |
A. | 2 |
B. | 4 |
C. | 8 |
D. | 9 |
Answer» E. | |
788. |
In general, the ________ have the smallest bit size and the ________ have the largest. |
A. | EEPROMs, Flash |
B. | SRAM, mask ROM |
C. | mask ROM, SRAM |
D. | DRAM, PROM |
Answer» B. SRAM, mask ROM | |
789. |
Advantage(s) of an EEPROM over an EPROM is/are: |
A. | the EPROM can be erased with ultraviolet light in much less time than an EEPROM |
B. | the EEPROM can be erased and reprogrammed without removal from the circuit |
C. | the EEPROM has the ability to erase and reprogram individual words |
D. | the EEPROM can be erased and reprogrammed without removal from the circuit, and can erase and reprogram individual words |
Answer» E. | |
790. |
The main advantage of semiconductor RAM is its ability to: |
A. | retain stored data when power is interrupted or turned off |
B. | be written to and read from rapidly |
C. | be randomly accessed |
D. | be sequentially accessed |
Answer» C. be randomly accessed | |
791. |
For the given circuit, what is the bit length of the output data word? |
A. | 3 |
B. | 4 |
C. | 8 |
D. | 32 |
Answer» C. 8 | |
792. |
How many clock pulses will be required to completely load serially a 5-bit shift register? |
A. | 2 |
B. | 3 |
C. | 4 |
D. | 5 |
Answer» E. | |
793. |
A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position(s) for each clock pulse. |
A. | right, one |
B. | right, two |
C. | left, one |
D. | left, three |
Answer» B. right, two | |
794. |
Which of the following describes the action of storing a bit of data in a mask ROM? |
A. | A 1 is stored in a bipolar cell by opening the base connection to the address line. |
B. | A 0 is stored in a bipolar cell by shorting the base connection to the address line. |
C. | A 1 is stored by connecting the gate of a MOS cell to the address line. |
D. | A 0 is stored by connecting the gate of a MOS cell to the address line. |
Answer» D. A 0 is stored by connecting the gate of a MOS cell to the address line. | |
795. |
Which type of ROM can be erased by UV light? |
A. | ROM |
B. | mask ROM |
C. | EPROM |
D. | EEPROM |
Answer» D. EEPROM | |
796. |
Which of the following is NOT a type of memory? |
A. | RAM |
B. | ROM |
C. | FPROM |
D. | EEPROM |
Answer» D. EEPROM | |
797. |
EEPROM stands for ________. |
A. | encapsulated electrical programmable read-only memory |
B. | elementary electrical programmable read-only memory |
C. | electrically erasable programmable read-only memory |
D. | elementary erasable programmable read-only memory |
Answer» D. elementary erasable programmable read-only memory | |
798. |
Which is not a hard disk performance parameter? |
A. | Seek time |
B. | Break time |
C. | Latency period |
D. | Access time |
Answer» C. Latency period | |
799. |
L1 is known as ________. |
A. | primary cache |
B. | secondary cache |
C. | DRAM |
D. | SRAM |
Answer» B. secondary cache | |
800. |
Describe the timing diagram of a write operation. |
A. | First the data is set on the data bus and the address is set, then the write pulse stores the data. |
B. | First the address is set, then the data is set on the data bus, and finally the read pulse stores the data. |
C. | First the write pulse stores the data, then the address is set, and finally the data is set on the data bus. |
D. | First the data is set on the data bus, then the write pulse stores the data, and finally the address is set. |
Answer» B. First the address is set, then the data is set on the data bus, and finally the read pulse stores the data. | |