MCQOPTIONS
Bookmark
Saved Bookmarks
→
Active Filter Circuits
→
Active Filters
→
The resistance of a JFET biased in the ohmic regio...
1.
The resistance of a JFET biased in the ohmic region is controlled by
A.
V D.
B.
V GS.
C.
V S.
D.
V DS.
Answer» C. V S.
Show Answer
Discussion
No Comment Found
Post Comment
Related MCQs
For a JFET, the value of V DS at which I D becomes essentially constant is the
If V D is less than expected (normal) for a self-biased JFET circuit, then it could be caused by a(n)
A JFET data sheet specifies V GS(off) = –10 V and I DSS = 8 mA. Find the value of I D when V GS = –3 V.
A JFET data sheet specifies V GS(off) = –6 V and I DSS = 8 mA. Find the value of I D when V GS = –3 V.
For a JFET, the change in drain current for a given change in gate-to-source voltage, with the drain-to-source voltage constant, is
High input resistance for a JFET is due to
The resistance of a JFET biased in the ohmic region is controlled by
What three areas are the drain characteristics of a JFET (V GS = 0) divided into?
A dual-gated MOSFET is
All MOSFETs are subject to damage from electrostatic discharge (ESD).
Reply to Comment
×
Name
*
Email
*
Comment
*
Submit Reply
Your experience on this site will be improved by allowing cookies. Read
Cookie Policy
Reject
Allow cookies