A programmable ROM has a decoder at the input and OR gates at the output, with

Only the former block being programmable

Both these block being fully programmable

Both these blocks being partially programmable

Only the latter block being programmable

Only the former block being programmable

Directions: It consists of two statements, one labelled as the ‘Statement (I)’ and the other as ‘Statement (II)’. You are to examine these two statements carefully and select the answer using the codes given below:Statement (I): Partial memory address decoding can result in simplified decoding logic.Statement (II): Partial decoding causes many-to-one mapping of addresses to memory location.

Statement (I) is true but Statement (II) is false

Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)

Both Statement (I) and Statement (II) are individually true but Statement (II) is NOT the correct explanation of Statement (I)

Statement (I) is true but Statement (II) is false

Statement (I) is false but Statement (II) is true

. In EPROMs, applying a high voltage to the upper gate causes, electrons to jump through the thin oxide onto the floating gate through the process known as

avalanche injection or Fowler-Nordheim-tunneling

Each cell of a static RAM contains

4 MOS transistors and 1 capacitor

4 MOS transistors and 2 capacitors

In a 5 × 7 dot matrix format

64 bits are required to store 64 alphanumeric characters

560 bits are required to store 64 alphanumeric characters

1120 bits are required to store 64 alphanumeric characters

2240 bits are required to store 64 alphanumeric characters

Non-inverting buffers boost:

Power level of a logical signal

Voltage level of a logical signal

256 address pins and 4 data pins

Directions: Each item consists of two statements, one labeled as ‘Statement (I)’ and the other as ‘Statement (II)’. Examine these two statements carefully and select the answer using the code given below:Statement (I): Large RAM with MOS circuit technology is used for the main memory in the computer system.Statement (II): An important application of ROM is to store system programs, library subroutines, etc.

Statement (I) is true but Statement (II) us false

Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)

Both Statement (I) and Statement(II) are individually true but Statement (II) is not the correct explanation of Statement(I)

Statement (I) is true but Statement (II) us false

Statement (I) is false but Statement (II) is true

Direction: The following item consists of two statements, one labeled as ‘Statement (I) and the other as ‘Statement II)’. You are to examine these two statements carefully and select the answers to these items using the code given below:Statement I): SRAM is used for cache memory and DRAM is used for main memory.Statement II): SRAM is somewhat faster than DRAM.

Both statement I and statement II are individually true but statement II is not the correct explanation of statement I

Both statement I and statement II are individually true and statement II is the correct explanation of statement I

Both statement I and statement II are individually true but statement II is not the correct explanation of statement I

Statement I is true but statement II is false

Statement I is false but statement II is true

Among memory types, the abbreviation MPDRAM stands for

Multipoint Dynamic Random Access Memory

Multiport Dynamic Random Access Memory

Multipoint Dynamic Random Access Memory

Multipoint Disk Random Access Memory

Multiport Dimensional Random Access Memory

Direction: The following item consists of two statements, one labeled as ‘Statement (I) and the other as ‘Statement (II). You are to examine these two statements carefully and select the answers to these items using the code given below:Statement (I): Control logic in CMOS is constructed using two-level SOP logic and multilevel logic.Statement (II): Typical PLA uses multi-level logic.

Statement (I) is false but Statement (II) is true

Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)

Both Statement (I) and Statement (II) are individually true but Statement (II) is NOT the correct explanation of Statement (I)

Statement (I) is true but Statement (II) is false

Statement (I) is false but Statement (II) is true

32 + Mcqs in Semiconductor Memories in Digital Electronics Page 1 McqOptions

1.	A programmable ROM has a decoder at the input and OR gates at the output, with
A.	Both these block being fully programmable
B.	Both these blocks being partially programmable
C.	Only the latter block being programmable
D.	Only the former block being programmable
Answer» D. Only the former block being programmable

Discussion

2.	Consider the following statements:1. SRAM is made up of flip flops2. SRAM stores bit as voltage3. DRAM has high speed and low density4. DRAM is cheaper than SRAMWhich of the above statements are correct?
A.	1, 2 and 3
B.	1, 3 and 4
C.	2, 3 and 4
D.	1, 2 and 4
Answer» E.

Discussion

3.	Dynamic memory cells are constructed using _________
A.	transistors
B.	MOSFETs
C.	flip-flops
D.	FETs
Answer» C. flip-flops

Discussion

4.	Directions: It consists of two statements, one labelled as the ‘Statement (I)’ and the other as ‘Statement (II)’. You are to examine these two statements carefully and select the answer using the codes given below:Statement (I): Partial memory address decoding can result in simplified decoding logic.Statement (II): Partial decoding causes many-to-one mapping of addresses to memory location.
A.	Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)
B.	Both Statement (I) and Statement (II) are individually true but Statement (II) is NOT the correct explanation of Statement (I)
C.	Statement (I) is true but Statement (II) is false
D.	Statement (I) is false but Statement (II) is true
Answer» C. Statement (I) is true but Statement (II) is false

Discussion

5.	In digital Electronics a byte is a collection of
A.	4 bits
B.	8 bits
C.	2 bits
D.	10 bits
Answer» C. 2 bits

Discussion

6.	. In EPROMs, applying a high voltage to the upper gate causes, electrons to jump through the thin oxide onto the floating gate through the process known as
A.	Mask programming
B.	one-time programming
C.	avalanche injection or Fowler-Nordheim-tunneling
D.	erasing
Answer» D. erasing

Discussion

7.	A 32 kB RAM is formed by 16 numbers of a particular type of SRAM IC. If each IC needs 14 address bits, what is the IC capacity?
A.	32 kbits
B.	16 kbits
C.	8 kbits
D.	4 kbits
Answer» C. 8 kbits

Discussion

8.	Consider the following statements:1. RAM is a non-volatile memory whereas ROM is a volatile memory2. RAM is a volatile memory whereas ROM is a non-volatile memory3. Both RAM and ROM are volatile memories but in ROM data is not when power is switched offWhich of the above statements are correct?
A.	1 only
B.	2 only
C.	3 only
D.	None of the above
Answer» C. 3 only

Discussion

9.	Five memory chips of 16 X 4 size have their address buses connected together. This system will be of the size
A.	16 X 16
B.	16 X 20
C.	20 X 16
D.	16 X 64
Answer» C. 20 X 16

Discussion

10.	Each cell of a static RAM contains
A.	4 MOS transistors
B.	4 MOS transistors and 1 capacitor
C.	2 MOS transistors
D.	4 MOS transistors and 2 capacitors
Answer» B. 4 MOS transistors and 1 capacitor

Discussion

11.	A microprocessor is designed to access 2 k ROM, 4 k PROM and 64 k RAM. The number of address lines required to access these memories by the μP is
A.	16
B.	17
C.	18
D.	19
Answer» B. 17

Discussion

12.	One of the following is a volatile memory device
A.	Hard disk
B.	Floppy disk
C.	RAM
D.	Magnetic tape
Answer» D. Magnetic tape

Discussion

13.	Memory chip NOVRAM is
A.	Only ROM
B.	Only RAM
C.	Combination of EEPROM and RAM
D.	Only PROM
Answer» D. Only PROM

Discussion

14.	RAM is a _____
A.	type of software
B.	CPU register
C.	temporary memory device
D.	permanent memory device.
Answer» D. permanent memory device.

Discussion

15.	How many bits are in a byte?
A.	2
B.	4
C.	8
D.	16
Answer» D. 16

Discussion

16.	In a 5 × 7 dot matrix format
A.	64 bits are required to store 64 alphanumeric characters
B.	560 bits are required to store 64 alphanumeric characters
C.	1120 bits are required to store 64 alphanumeric characters
D.	2240 bits are required to store 64 alphanumeric characters
Answer» E.

Discussion

17.	One dit is equal to ___________
A.	1.14 bits
B.	3.32 bits
C.	1.17 bits
D.	none of these
Answer» C. 1.17 bits

Discussion

18.	Most of the memory systems have
A.	electro-pneumatic properties
B.	electrostatic properties
C.	magnetic properties
D.	all of these
Answer» E.

Discussion

19.	EPROM is based on:
A.	TTL logic
B.	FAMOS
C.	Magnetic RAM
D.	Bipolar transistors
Answer» C. Magnetic RAM

Discussion

20.	Non-inverting buffers boost:
A.	Power level of a logical signal
B.	Fan in of a logical signal
C.	Voltage level of a logical signal
D.	Fan out of a logical signal
Answer» E.

Discussion

21.	_______ is used in reading a CD
A.	LASER
B.	MESER
C.	Neon light
D.	All of these
Answer» B. MESER

Discussion

22.	For a 4096 × 8 EPROM, the number of address lines is
A.	14
B.	12
C.	10
D.	8
Answer» C. 10

Discussion

23.	A 256 × 4 EPROM has
A.	8 address pins and 2 data pins
B.	8 address pins and 4 data pins
C.	8 address pins and 8 data pins
D.	256 address pins and 4 data pins
Answer» C. 8 address pins and 8 data pins

Discussion

24.	Directions: Each item consists of two statements, one labeled as ‘Statement (I)’ and the other as ‘Statement (II)’. Examine these two statements carefully and select the answer using the code given below:Statement (I): Large RAM with MOS circuit technology is used for the main memory in the computer system.Statement (II): An important application of ROM is to store system programs, library subroutines, etc.
A.	Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)
B.	Both Statement (I) and Statement(II) are individually true but Statement (II) is not the correct explanation of Statement(I)
C.	Statement (I) is true but Statement (II) us false
D.	Statement (I) is false but Statement (II) is true
Answer» C. Statement (I) is true but Statement (II) us false

Discussion

25.	Memory is a device that stores ___________.
A.	Analog information
B.	Binary voltage
C.	Binary information
D.	Analog and binary information
Answer» D. Analog and binary information

Discussion

26.	Direction: The following item consists of two statements, one labeled as ‘Statement (I) and the other as ‘Statement II)’. You are to examine these two statements carefully and select the answers to these items using the code given below:Statement I): SRAM is used for cache memory and DRAM is used for main memory.Statement II): SRAM is somewhat faster than DRAM.
A.	Both statement I and statement II are individually true and statement II is the correct explanation of statement I
B.	Both statement I and statement II are individually true but statement II is not the correct explanation of statement I
C.	Statement I is true but statement II is false
D.	Statement I is false but statement II is true
Answer» B. Both statement I and statement II are individually true but statement II is not the correct explanation of statement I

Discussion

27.	Consider the following statements for a DRAM :1. Bit is stored as a charge.2. It is made of MOS transistors.3. Speed of DRAM is faster than processors.4. Each memory cell requires six transistors.Which of these statements are correct?
A.	1 and 2 only
B.	2 and 3 only
C.	3 and 4 only
D.	1, 2, 3 and 4
Answer» B. 2 and 3 only

Discussion

28.	Among memory types, the abbreviation MPDRAM stands for
A.	Multiport Dynamic Random Access Memory
B.	Multipoint Dynamic Random Access Memory
C.	Multipoint Disk Random Access Memory
D.	Multiport Dimensional Random Access Memory
Answer» B. Multipoint Dynamic Random Access Memory

Discussion

29.	An SRAM has address lines from A0 to A19 and data width from D0 to D15. The total capacity of the SRAM will be:
A.	2 Mb
B.	16 Mb
C.	8 Mb
D.	4 Mb
Answer» B. 16 Mb

Discussion

30.	Consider the following statements:1. Semiconductor memories are organized as linear array of memory locations2. To address a memory location out of N memory locations, at least log N bits of address are required3. 8086 can address 1,048,576 addresses4. Memory for an 8086 is set up as two banks to make it possible to read or write a word with one machine cycleWhich of the above statements are correct?
A.	1, 2 and 3 only
B.	1, 2 and 4 only
C.	3 and 4 only
D.	1, 2, 3 and 4
Answer» D. 1, 2, 3 and 4

Discussion

31.	Direction: The following item consists of two statements, one labeled as ‘Statement (I) and the other as ‘Statement (II). You are to examine these two statements carefully and select the answers to these items using the code given below:Statement (I): Control logic in CMOS is constructed using two-level SOP logic and multilevel logic.Statement (II): Typical PLA uses multi-level logic.
A.	Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)
B.	Both Statement (I) and Statement (II) are individually true but Statement (II) is NOT the correct explanation of Statement (I)
C.	Statement (I) is true but Statement (II) is false
D.	Statement (I) is false but Statement (II) is true
Answer» D. Statement (I) is false but Statement (II) is true

Discussion

32.	PLA stands for:
A.	Programmable Logic Array
B.	Parabolic Logic Array
C.	Partial Logic Array
D.	Predictable Logical Array
Answer» B. Parabolic Logic Array

Discussion

Explore topic-wise MCQs in Digital Electronics.

A programmable ROM has a decoder at the input and OR gates at the output, with

Consider the following statements:1. SRAM is made up of flip flops2. SRAM stores bit as voltage3. DRAM has high speed and low density4. DRAM is cheaper than SRAMWhich of the above statements are correct?

Dynamic memory cells are constructed using _________

In digital Electronics a byte is a collection of

. In EPROMs, applying a high voltage to the upper gate causes, electrons to jump through the thin oxide onto the floating gate through the process known as

A 32 kB RAM is formed by 16 numbers of a particular type of SRAM IC. If each IC needs 14 address bits, what is the IC capacity?

Consider the following statements:1. RAM is a non-volatile memory whereas ROM is a volatile memory2. RAM is a volatile memory whereas ROM is a non-volatile memory3. Both RAM and ROM are volatile memories but in ROM data is not when power is switched offWhich of the above statements are correct?

Five memory chips of 16 X 4 size have their address buses connected together. This system will be of the size

Each cell of a static RAM contains

A microprocessor is designed to access 2 k ROM, 4 k PROM and 64 k RAM. The number of address lines required to access these memories by the μP is

One of the following is a volatile memory device

Memory chip NOVRAM is

RAM is a _____

How many bits are in a byte?

In a 5 × 7 dot matrix format

One dit is equal to ___________

Most of the memory systems have

EPROM is based on:

Non-inverting buffers boost:

_______ is used in reading a CD

For a 4096 × 8 EPROM, the number of address lines is

A 256 × 4 EPROM has

Memory is a device that stores ___________.

Consider the following statements for a DRAM :1. Bit is stored as a charge.2. It is made of MOS transistors.3. Speed of DRAM is faster than processors.4. Each memory cell requires six transistors.Which of these statements are correct?

Among memory types, the abbreviation MPDRAM stands for

An SRAM has address lines from A0 to A19 and data width from D0 to D15. The total capacity of the SRAM will be:

PLA stands for: