active-LOW inputs and an active-HIGH output.

active-LOW inputs and an active-LOW output.

active-HIGH inputs and an active-HIGH output.

active-HIGH inputs and an active-LOW output.

65 + Mcqs in Describing Logic Circuits in Digital Electronics Page 1 McqOptions

1.	The commutative law of Boolean addition states that + = · .
A.	True
B.	False
Answer» C.

Discussion

2.	The inputs to an AND gate are: = 1, = 0, = 1. The output will be LOW.
A.	True
B.	False
Answer» B. False

Discussion

3.	The expressions, , are equivalent.
A.	True
B.	False
Answer» B. False

Discussion

4.	Boolean multiplication is symbolized by + .
A.	True
B.	False
Answer» C.

Discussion

5.	The Boolean expression for a three-input AND gate is = .
A.	True
B.	False
Answer» B. False

Discussion

6.	The commutative law of Boolean addition states that A + B = A · B.
A.	True
B.	False
Answer» C.

Discussion

7.	In Boolean algebra, 1 · 0 = 0.
A.	True
B.	False
Answer» B. False

Discussion

8.	The Boolean equation for a NOR function is:
A.	[A].
B.	[B].
C.	[C].
D.	[D].
Answer» C. [C].

Discussion

9.	Simplify the expression using DeMorgan's theorems.
A.	[A].
B.	[B].
C.	[C].
D.	[D].
Answer» C. [C].

Discussion

10.	Which of the following is a form of DeMorgan's theorem?
A.	[A].
B.	[B].
C.	[C].
D.	[D].
Answer» D. [D].

Discussion

11.	The comments in ADHL are enclosed between # characters.
A.	1
B.
Answer» C.

Discussion

12.	The Boolean expression for a three-input AND gate is X = ABC.
A.	1
B.
Answer» B.

Discussion

13.	The timing diagram for a two-input NAND gate is shown below. The gate is working correctly.
A.	1
B.
Answer» B.

Discussion

14.	VHDL is not a new language.
A.	1
B.
Answer» B.

Discussion

15.	The output of a NAND gate is the inverse of the output for an AND gate for all possible input combinations.
A.	1
B.
Answer» B.

Discussion

16.	The given figure shows the correct logic implementation of the distributive law.
A.	1
B.
Answer» B.

Discussion

17.	A NAND gate consists of an AND gate and an OR gate connected in series with each other.
A.	1
B.
Answer» C.

Discussion

18.	NOR gates can be used to construct AND gates.
A.	1
B.
Answer» B.

Discussion

19.	Boolean multiplication is symbolized by A + B.
A.	1
B.
Answer» C.

Discussion

20.	Output logic levels for certain input conditions of a logic circuit may often be determined without using the Boolean expression.
A.	1
B.
Answer» B.

Discussion

21.	The commutative law of Boolean addition states that A + B = A ¬∑ B.
A.	1
B.
Answer» C.

Discussion

22.	Boolean algebra was first applied to the analysis of digital circuits by Claude Shannon at Stanford University.
A.	1
B.
Answer» C.

Discussion

23.	In an expression containing both AND and OR operations, the AND operations are performed first (unless parentheses indicate otherwise).
A.	1
B.
Answer» B.

Discussion

24.	A two-input NAND gate has inputs of 1 and 0; the output is 0.
A.	1
B.
Answer» C.

Discussion

25.	The inputs to an AND gate are: A = 1, B = 0, C = 1. The output will be LOW.
A.	1
B.
Answer» B.

Discussion

26.	The figure given below is an example of the implementation of AND-OR-INVERT logic.
A.	1
B.
Answer» C.

Discussion

27.	The application of DeMorgan's theorems to a Boolean expression with double and single inversions produces a resultant expression that contains only single inverter signs over single variables.
A.	1
B.
Answer» B.

Discussion

28.	In a text-based language, the circuit being described must be given a name.
A.	1
B.
Answer» B.

Discussion

29.	In Boolean algebra, 1 ¬∑ 0 = 0.
A.	1
B.
Answer» B.

Discussion

30.	A minimum of three universal NOR gates would be required to perform the logical operation of a 2-input AND gate.
A.	1
B.
Answer» B.

Discussion

31.	The effect of an inverted output being connected to the inverting input of another gate is to effectively eliminate one of the inversions, resulting in a single inversion.
A.	1
B.
C.	1
D.
Answer» C. 1

Discussion

32.	The NAND gate is an example of combinational logic.
A.	1
B.
Answer» B.

Discussion

33.	How are the statements between BEGIN and END not evaluated in VHDL?
A.	Constantly
B.	Simultaneously
C.	Concurrently
D.	Sequentially
Answer» E.

Discussion

34.	Which of the symbols shown below represents an AND gate?
A.	a
B.	b
C.	c
D.	d
Answer» E.

Discussion

35.	Which logic gate does this truth table describe?
A.	AND
B.	OR
C.	NAND
D.	NOR
Answer» E.

Discussion

36.	Which of the figures given below represents a NAND gate?
A.	a
B.	b
C.	c
D.	d
Answer» B. b

Discussion

37.	The special software application that translates from HDL into a grid of 1's and 0's, which can be loaded into a PLD, is called a:
A.	formatter.
B.	compiler.
C.	programmable wiring.
D.	CPU.
Answer» C. programmable wiring.

Discussion

38.	The SUBDESIGN section defines the input and output of the logic circuit block.
A.	1
B.
Answer» B.

Discussion

39.	The truth table shown below describes the operation of a NOR gate.
A.	1
B.
C.	1
D.
Answer» C. 1

Discussion

40.	A NAND gate has:
A.	active-LOW inputs and an active-HIGH output.
B.	active-LOW inputs and an active-LOW output.
C.	active-HIGH inputs and an active-HIGH output.
D.	active-HIGH inputs and an active-LOW output.
Answer» E.

Discussion

41.	A NOR gate with one HIGH input and one LOW input:
A.	will output a HIGH
B.	functions as an AND
C.	will not function
D.	will output a LOW
Answer» E.

Discussion

42.	The symbol shown below is an AND gate.
A.	1
B.
Answer» B.

Discussion

43.	For a three-input NOR gate, with the input waveforms as shown below, which output waveform is correct?
A.	a
B.	b
C.	c
D.	d
Answer» B. b

Discussion

44.	In VHDL, local signals are declared in the VARIABLE section, which is placed between the SUBDESIGN section and the logic section.
A.	1
B.
C.	1
D.
Answer» C. 1

Discussion

45.	In VHDL, the mode of a port does not define:
A.	an input.
B.	an output.
C.	both an input and an output.
D.	the TYPE of the bit.
Answer» E.

Discussion

46.	The OR gate performs like two switches wired in a series.
A.	1
B.
C.	1
D.
Answer» C. 1

Discussion

47.	Which of the following equations would accurately describe a 4-input OR gate when A = 1, B = 1, C = 0, and D = 0?
A.	1 + 1 + 0 + 0 = 1
B.	1 + 1 + 0 + 0 = 01
C.	1 + 1 + 0 + 0 = 0
D.	1 + 1 + 0 + 0 = 00
Answer» B. 1 + 1 + 0 + 0 = 01

Discussion

48.	Which of the figures given below represents an OR gate?
A.	a
B.	b
C.	c
D.	d
Answer» B. b

Discussion

49.	The complement of 1 is 0.
A.	1
B.
Answer» B.

Discussion

50.	An OR gate with inverted inputs functions as:
A.	an AND gate.
B.	a NAND gate.
C.	a NOR gate.
D.	an inverter.
Answer» C. a NOR gate.

Discussion

Explore topic-wise MCQs in Digital Electronics.

The commutative law of Boolean addition states that + = · .

The inputs to an AND gate are: = 1, = 0, = 1. The output will be LOW.

The expressions, , are equivalent.

Boolean multiplication is symbolized by + .

The Boolean expression for a three-input AND gate is = .

The commutative law of Boolean addition states that A + B = A · B.

In Boolean algebra, 1 · 0 = 0.

The Boolean equation for a NOR function is:

Simplify the expression using DeMorgan's theorems.

Which of the following is a form of DeMorgan's theorem?

The comments in ADHL are enclosed between # characters.

The Boolean expression for a three-input AND gate is X = ABC.

The timing diagram for a two-input NAND gate is shown below. The gate is working correctly.

VHDL is not a new language.

The output of a NAND gate is the inverse of the output for an AND gate for all possible input combinations.

The given figure shows the correct logic implementation of the distributive law.

A NAND gate consists of an AND gate and an OR gate connected in series with each other.

NOR gates can be used to construct AND gates.

Boolean multiplication is symbolized by A + B.

Output logic levels for certain input conditions of a logic circuit may often be determined without using the Boolean expression.

The commutative law of Boolean addition states that A + B = A ¬∑ B.

Boolean algebra was first applied to the analysis of digital circuits by Claude Shannon at Stanford University.

In an expression containing both AND and OR operations, the AND operations are performed first (unless parentheses indicate otherwise).

A two-input NAND gate has inputs of 1 and 0; the output is 0.

The inputs to an AND gate are: A = 1, B = 0, C = 1. The output will be LOW.

The figure given below is an example of the implementation of AND-OR-INVERT logic.

The application of DeMorgan's theorems to a Boolean expression with double and single inversions produces a resultant expression that contains only single inverter signs over single variables.

In a text-based language, the circuit being described must be given a name.

In Boolean algebra, 1 ¬∑ 0 = 0.

A minimum of three universal NOR gates would be required to perform the logical operation of a 2-input AND gate.

The effect of an inverted output being connected to the inverting input of another gate is to effectively eliminate one of the inversions, resulting in a single inversion.

The NAND gate is an example of combinational logic.

How are the statements between BEGIN and END not evaluated in VHDL?

Which of the symbols shown below represents an AND gate?

Which logic gate does this truth table describe?

Which of the figures given below represents a NAND gate?

The special software application that translates from HDL into a grid of 1's and 0's, which can be loaded into a PLD, is called a:

The SUBDESIGN section defines the input and output of the logic circuit block.

The truth table shown below describes the operation of a NOR gate.

A NAND gate has:

A NOR gate with one HIGH input and one LOW input:

The symbol shown below is an AND gate.

For a three-input NOR gate, with the input waveforms as shown below, which output waveform is correct?

In VHDL, local signals are declared in the VARIABLE section, which is placed between the SUBDESIGN section and the logic section.

In VHDL, the mode of a port does not define:

The OR gate performs like two switches wired in a series.

Which of the following equations would accurately describe a 4-input OR gate when A = 1, B = 1, C = 0, and D = 0?

Which of the figures given below represents an OR gate?

The complement of 1 is 0.

An OR gate with inverted inputs functions as: