MCQOPTIONS
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MCQOPTIONS
This section includes 10 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.
| 1. |
WHICH_METHOD_HAS_MORE_AREA_OVERHEAD??$ |
| A. | random test pattern |
| B. | pseudo random test pattern |
| C. | algorithmic test pattern |
| D. | deterministic test pattern |
| Answer» C. algorithmic test pattern | |
| 2. |
AND gate is used to ensure whether the test patterns have sufficient clock cycles? |
| A. | true |
| B. | false |
| Answer» C. | |
| 3. |
The sequential depth is the number of |
| A. | OR gates |
| B. | AND gates |
| C. | flip flops |
| D. | EX-OR gates |
| Answer» D. EX-OR gates | |
| 4. |
Reset signal weight is given as |
| A. | 2<sup>m</sup> |
| B. | 2<sup>(-m)</sup> |
| C. | 2m |
| D. | 2(-m) |
| Answer» C. 2m | |
| 5. |
Initialization of the test pattern generator to all 1’s generate$ |
| A. | golbal reset |
| B. | clear |
| C. | toggle |
| D. | buffer |
| Answer» B. clear | |
| 6. |
The probability of given bit in LFSR being logic 0 is |
| A. | 0 |
| B. | 1 |
| C. | 0.25 |
| D. | 0.5 |
| Answer» E. | |
| 7. |
Circuits with global reset have fault coverage in the range of |
| A. | 5% to 10% |
| B. | 11% to 15% |
| C. | 15% to 20% |
| D. | 6% to 8% |
| Answer» C. 15% to 20% | |
| 8. |
The circuit which incorporates _______ can be tested with weighted pseudo-random test pattern |
| A. | preset |
| B. | reset |
| C. | clear |
| D. | break |
| Answer» B. reset | |
| 9. |
Large AND function will produce _______ infrequently |
| A. | logic 0 |
| B. | logic 0 and logic 1 |
| C. | logic 1 |
| D. | neither logic 0 or 1 |
| Answer» D. neither logic 0 or 1 | |
| 10. |
Which exhibits low fault coverage? |
| A. | random test pattern |
| B. | pseudo random test pattern |
| C. | deterministic test pattern |
| D. | algorithmic test pattern |
| Answer» C. deterministic test pattern | |