Explore topic-wise MCQs in Vlsi.

This section includes 16 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.

1.

Which of these invertors is more efficient?

A. Depletion mode n-MOS inverter
B. pMOS inverter
C. CMOS inverter
D. Resistive load nMOS inverter
Answer» D. Resistive load nMOS inverter
2.

The switching threshold voltage VTH for an ideal inverter is equal to:

A. (VDD-VOL)/2
B. VDD
C. (VDD)/2
D. 0
Answer» D. 0
3.

When the input of the CMOS inverter is equal to Inverter Threshold Voltage Vth, the transistors are operating in:

A. N-MOS is cutoff, p-MOS is in Saturation
B. P-MOS is cutoff, n-MOS is in Saturation
C. Both the transistors are in linear region
D. Both the transistors are in saturation region
Answer» E.
4.

In the CMOS inverter the output voltage is measured across:

A. Drain of n-MOS transistor and ground
B. Source of p-MOS transistor and ground
C. Source of n-MOS transistor and source of p-MOS transistor
D. Gate of p-MOS transistor and Gate of n-MOS transistor
Answer» B. Source of p-MOS transistor and ground
5.

The CMOS inverter consists of:

A. Enhancement mode n-MOS transistor and depletion mode p-MOS transistor
B. Enhancement mode p-MOS transistor and depletion mode n-MOS transistor
C. Enhancement mode p-MOS transistor and enhancement mode p-MOS transistor
D. Enhancement mode p-MOS transistor and enhancement mode n-MOS transistor
Answer» E.
6.

WHEN_THE_INPUT_OF_THE_CMOS_INVERTER_IS_EQUAL_TO_INVERTER_THRESHOLD_VOLTAGE_VTH,_THE_TRANSISTORS_ARE_OPERATING_IN:?$

A. N-MOS is cutoff, p-MOS is in Saturation
B. P-MOS is cutoff, n-MOS is in Saturation
C. Both the transistors are in linear region
D. Both the transistors are in saturation region
Answer» E.
7.

The switching threshold voltage VTH for an ideal inverter is equal to:$

A. (VDD-VOL)/2
B. VDD
C. (VDD)/2
D. 0
Answer» D. 0
8.

In the CMOS inverter the output voltage is measured across?

A. Drain of n-MOS transistor and ground
B. Source of p-MOS transistor and ground
C. Source of n-MOS transistor and source of p-MOS transistor
D. Gate of p-MOS transistor and Gate of n-MOS transistor
Answer» B. Source of p-MOS transistor and ground
9.

The CMOS inverter consist of:

A. Enhancement mode n-MOS transistor and depletion mode p-MOS transistor
B. Enhancement mode p-MOS transistor and depletion mode n-MOS transistor
C. Enhancement mode p-MOS transistor and enhancement mode p-MOS transistor
D. Enhancement mode p-MOS transistor and enhancement mode n-MOS transistor
Answer» E.
10.

The enhancement mode n-MOS load inverter requires 2 different supply voltages to:

A. Keep load transistor in cutoff region
B. Keep load transistor in linear region
C. Keep load transistor in saturation region
D. None of the mentioned
Answer» C. Keep load transistor in saturation region
11.

The depletion mode n-MOS as an active load is better than enhancement load n-MOS in:

A. Sharp VTC transition and better noise margins
B. Single power supply
C. Smaller overall layout area
D. All of the mentioned
Answer» E.
12.

The average power dissipated in resistive load n-MOS inverter is:

A. 0
B. VDD (VDD-VOL)/R
C. VDD (VDD-VOL)/2R
D. VDD (VDD-VIH)/2R
Answer» D. VDD (VDD-VIH)/2R
13.

What will be the effect on output voltage if the positions of n-MOS and p-MOS in CMOS inverter circuit are exchanged?

A. Output is same
B. Output is reversed
C. Output is always high
D. Output is always low
Answer» C. Output is always high
14.

If the n-MOS and p-MOS of the CMOS inverters are interchanged the output is measured at:

A. Source of the both transistor
B. Drains of the both transistor
C. Drain of n-MOS and source of p-MOS
D. Source of n-MOS and drain of p-MOS
Answer» B. Drains of the both transistor
15.

The n-MOS invertor consists of n-MOS transistor as driven and

A. Resistor as a load
B. Depletion mode n-MOS as a load
C. Enhancement mode n-MOS as a load
D. Any of the mentioned
Answer» E.
16.

The n-MOS invertor is better than BJT in terms of:

A. Fast switching time
B. Low power loss
C. Smaller overall layout area
D. All the the mentioned
Answer» E.