Barrier height in a metal-semiconductor contact can easily be estimated from

$\left( {\frac{1}{C}} \right)$ versus I curve

$\left( {\frac{1}{C}} \right)$ versus V curve

$\left( {\frac{1}{{{C^2}}}} \right)$ versus V curve

$\left( {\frac{1}{C}} \right)$ versus I curve

$\left( {\frac{1}{{{C^2}}}} \right)$ versus I curve

A standard CMOS inverter is designed with equal rise and fall times (βn = βp). If the width of the P MOS transistor in the inverter is increased, what would be the effect on the LOW noise margin (NML) and the HIGH noise margin (NMH) ?

NML decreases and NMH increases

NML increases and NMH decreases

NML decreases and NMH increases

Voltage controlled voltage source

Current controlled current source

Current controlled voltage source

Voltage controlled current source

Voltage controlled voltage source

A CMOS amplifier when compared to an N–channel MOSFET, has the advantage of

Lower drain current from the power supply, thereby less dissipation

Body effect in MOSFET’s results in

decrease in the value of transconductance

increase in the value of transconductance

change in the value of threshold voltage

decrease in the value of transconductance

increase in the value of output

For an ideal MS contact between a metal and a P-type semi conductor. The relation between barrier height $q \; \phi_{B_pO}$is given by

$q \; \phi_{B_pO}=q(\phi_m - \chi)$

$q \; \phi_{B_pO}=\frac{Eg}{2}-q(\phi_m - \chi)$

$q \; \phi_{B_pO}=q(\chi-\phi_m)$

$q \; \phi_{B_pO}={Eg}-q(\phi_m - \chi)$

Directions:The following question consist of two statements, one labelled as ‘Statement (I)’ and the other as ‘Statement (II)’. You are to examine these two statements carefully and select the answers to these items using the code given below:Statement (I): The gate of MOSFET is insulated from the body of FET by deposition of a very thin fragile layer of SiO2 over the substrate.Statement (II): The device is therefore called as an insulated gate field-effect transistor (IGFET).Code

Both Statement (I and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I)

Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)

Both Statement (I and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I)

Statement (I) is true but Statement (II) is false

Statement (I) is false but Statement (II) is true

In n-channel enhancement type MOSFET, as VGS is increased beyond the threshold level

Density of free carriers in the induced channel will remain constant

Density of free carriers in the induced channel will decrease

Density of free carriers in the induced channel will increase

In a circuit shown in the figure, the transistors M1 and M2 are operating in saturation. The channel length modulation coefficients of both the transistors are non-zero. The transconductance of the MOSFETs M1 and M2 are gm1 and gm2, respectively, and the internal resistance of the MOSFETs M1 and M2 are r01 and r02, respectively.Ignoring the body effect, the ac small-signal voltage gain (∂Vout / ∂Vin) of the circuit is:

$- {g_{m1}}\left( {\frac{1}{{{g_{m2}}}}||{r_{01}}||{r_{02}}} \right)$

$- {g_{m2}}\left( {\frac{1}{{{g_{m1}}}}||{r_{02}}} \right)$

$- {g_{m2}}\left( {\frac{1}{{{g_{m1}}}}||{r_{01}}||{r_{02}}} \right)$

$- {g_{m1}}\left( {\frac{1}{{{g_{m2}}}}||{r_{01}}||{r_{02}}} \right)$

$- {g_{m2}}\left( {r_{01}||{r_{02}}} \right)$

Assertion (A) : The drain induced barrier lowering and channel length modulation are some of the short channel effects in MOSFETReason (R): The cut-off frequency of a MOSFET is independent of gate to source and gate to drain capacitance.

Both (A) and (R) are true and (R) is the correct explanation of (A).

Both (A) and (R) are true, but (R) is not the correct explanation of (A)

An n-channel enhancement mode MOSFET is biased at VGS > VTH and VDS > (VGS - VTH), where VGS is the gate-to-source voltage, VDS is the drain-to-source voltage and VTH is the threshold voltage. Considering channel length modulation effect to be significant, the MOSFET behaves as a

current source with infinite output impedance

voltage source with zero output impedance

voltage source with non-zero output impedance

current source with finite output impedance

current source with infinite output impedance

Directions: The below item consists of two statements, one labelled as the 'Statement (I)' and the other as 'Statement (II)'. Examine these two statements carefully and select the answers to these items using the codes given below:Statement (I): Conduction takes place in an enhancement MOSFET only for gate voltages below the threshold level.Statement (II): In an enhancement MOSFET, a channel of semiconductor of the same type as the source and drain is induced in the substrate by a positive voltage applied to the gate.Codes:

Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)

Both Statement (I) and Statement (II) are individually true but Statement (II) is NOT the correct explanation of Statement (I)

Statement (I) is true but Statement (II) is false

Statement (I) is false but Statement (II) is true

THE_OUTPUT_CHARACTERISTICS_OF_A_MOSFET,_IS_A_PLOT_OF?$

Ig as a function of Vgs with Vds as a parameter

Id as a function of Vgs with Vds as a parameter

Id as a function of Vds with Vgs as a parameter

Ig as a function of Vgs with Vds as a parameter

Ig as a function of Vds with Vgs as a parameter

IN_THE_TRANSFER_CHARACTERISTICS_OF_A_MOSFET,_THE_THRESHOLD_VOLTAGE_IS_THE_MEASURE_OF_THE?$

minimum voltage till which temperature is constant

minimum voltage to induce a n-channel/p-channel for conduction

minimum voltage till which temperature is constant

minimum voltage to turn off the device

none of the above mentioned is true

In the internal structure of a MOSFET, a parasitic BJT exists between th?

there is no parasitic BJT in MOSFET

The arrow on the symbol of MOSFET indicates

the direction of conventional current flow

51 + Mcqs in Mosfet in Power Electronics Page 1 McqOptions

1.	For n-channel depletion MOSFET, the highest trans-conductance gain for a small signal is at
A.	VGS = 0 V
B.	VGS = Vp
C.	VGS = \|Vp\|
D.	VGS = -Vp
Answer» B. VGS = Vp

Discussion

2.	For a given n-MOS capacitor with substrate doping of NA=1017 cm−3, oxide thickness 20 nm, εox= 3.9 εo the values of oxide capacitance and flat band capacitance are respectively given as(use εo = 8.85×10−14 F cm−1):
A.	142 nF/cm2 and 172 nF/cm2
B.	172 nF/cm2 and 142 nF/cm2
C.	71 nF/cm2 and 86 nF/cm2
D.	86 nF/cm2 and 71 nF/cm2
Answer» C. 71 nF/cm2 and 86 nF/cm2

Discussion

3.	Match List-I with List-II:List-I(Analog Devices)List-II(I / P impedances)a)BJTi)> 1012 Ωb)MOSFETii)> 1010 Ωc)JFETiii)> 108 Ωd)MESFETiv)< 104 ΩChoose the correct option from those given below:
A.	a-iv; b-iii; c-i; d-ii
B.	a-i; b-ii; c-iii; d-iv
C.	a-iii; b-i; c-ii; d-iv
D.	a-iv; b-ii; c-iii; d-i
Answer» E.

Discussion

4.	An NMOS has Id = 5 mA, Vgs = 2 V, Vds = 4 V and Vt = 0.8 V. If the thickness of oxide is 500 A° , the aspect ratio of device at room temperature is
A.	1.5
B.	14
C.	25
D.	35
Answer» D. 35

Discussion

5.	Barrier height in a metal-semiconductor contact can easily be estimated from
A.	$\left( {\frac{1}{C}} \right)$ versus V curve
B.	$\left( {\frac{1}{{{C^2}}}} \right)$ versus V curve
C.	$\left( {\frac{1}{C}} \right)$ versus I curve
D.	$\left( {\frac{1}{{{C^2}}}} \right)$ versus I curve
Answer» C. $\left( {\frac{1}{C}} \right)$ versus I curve

Discussion

6.	Consider the following statements for a metal oxide semiconductor field-effect transistor(MOSFET):P: As channel length reduces, OFF-state current increases.Q: As channel length reduces, output resistance increases.R: As channel length reduces, threshold voltage remains constant.S: As channel length reduces, ON current increases.Which of the above statements is INCORRECT?
A.	P and Q
B.	P and S
C.	Q and R
D.	R and S
Answer» D. R and S

Discussion

7.	Both transistor T1 and T2 in figure have a threshold voltage of 1V. The device parameter K1 and K2 of T1 and T2 are 36 μAN2 and 9 μA/V2 respectively. The o/p voltage V0 is
A.	1V
B.	2V
C.	3V
D.	4V
Answer» D. 4V

Discussion

8.	For the n-channel MOS transistor shown in the figure, the threshold voltage VTh is 0.8 V. Neglect channel length modulation effects. When the drain voltage VD = 1.6 V, the drain current ID was found to be 0.5 mA. If VD is adjusted to be 2 V by changing the values of r and VDD, the new value of ID (in mA) is
A.	0.625
B.	0.75
C.	1.125
D.	1.5
Answer» D. 1.5

Discussion

9.	Given, Vgs is the gate-source voltage, Vds is the drain source voltage, and Vth is the threshold voltage of an enhancement type NMOS transistor, the conditions for transistor to be biased in saturation are
A.	Vgs < Vth; Vds ≥ Vgs - Vth
B.	Vgs > Vth; Vds ≥ Vgs – Vth
C.	Vgs > Vth; Vds ≤ Vgs – Vth
D.	Vgs < Vth; Vds ≤ Vgs – Vth
Answer» C. Vgs > Vth; Vds ≤ Vgs – Vth

Discussion

10.	Power dissipation is negligibly small in:
A.	SCR
B.	BJT
C.	MOSFET
D.	CMOS
Answer» E.

Discussion

11.	An enhancement MOSFET of threshold voltage 3 V is being used in the sample and hold circuit given below. Assume that the substrate of the MOS device is connected to – 10 V. If the input voltage VI lies between ± 10 V, the minimum and the maximum values of VG required for proper sampling and holding respectively, are
A.	3 V and -3 V
B.	10 V and – 10 V
C.	13 V and -7 V
D.	10 V and – 13 V
Answer» D. 10 V and – 13 V

Discussion

12.	A standard CMOS inverter is designed with equal rise and fall times (βn = βp). If the width of the P MOS transistor in the inverter is increased, what would be the effect on the LOW noise margin (NML) and the HIGH noise margin (NMH) ?
A.	NML increases and NMH decreases
B.	NML decreases and NMH increases
C.	Both NML and NMH increase
D.	No change in the noise margins
Answer» B. NML decreases and NMH increases

Discussion

13.	A switched mode power supply operating at 20 kHz to 100 kHz range uses as the main switching element is __________.
A.	Thyristor
B.	MOS FET
C.	Triac
D.	UJT
Answer» C. Triac

Discussion

14.	In the given circuit, S1 switch remains closed and S2 remains open for a long time. At t = 0, S1 opens and S2 closes and remain in this position for a long time. Find drain current for t < 0 and t 0 respectively if, μnCox = 100 μA/V2 and Aspect ratio = 2.
A.	600 μA, 0 μA
B.	600 μA, 25 μA
C.	600 μA, -25 μA
D.	0 μA, 600 μA
Answer» B. 600 μA, 25 μA

Discussion

15.	MOSFET is a
A.	Current controlled current source
B.	Current controlled voltage source
C.	Voltage controlled current source
D.	Voltage controlled voltage source
Answer» D. Voltage controlled voltage source

Discussion

16.	A CMOS amplifier when compared to an N–channel MOSFET, has the advantage of
A.	Higher cut–off frequency
B.	Higher voltage gain
C.	Higher current gain
D.	Lower drain current from the power supply, thereby less dissipation
Answer» E.

Discussion

17.	Body effect in MOSFET’s results in
A.	increase in the value of transconductance
B.	change in the value of threshold voltage
C.	decrease in the value of transconductance
D.	increase in the value of output
Answer» C. decrease in the value of transconductance

Discussion

18.	In a MOSFET, SiO2 breaks down breaks down at electric field of the order of 5 × 106 V/cm. For a gate oxide thickness 1000 Angstroms and channel thickness of 2 μm, what is the maximum VGS it can withstand?
A.	5 V
B.	10 V
C.	100 V
D.	None of the above
Answer» E.

Discussion

19.	In the ______ region, a transistor act as closed switch.
A.	Inverse active region
B.	Saturation
C.	Cut-off region
D.	Active region
Answer» C. Cut-off region

Discussion

20.	In a p-type Si at 300 K and Na = 8 × 1015 cm-3, the variation of space-charge density in the semiconductor as a function of surface potential is plotted. Then select the true statement for the weak inversion region. Given that ps and ns are hole and electron concentrations at the surface.
A.	ps > Na
B.	ns < Na and ns > ps
C.	ns < Na and ps < Na
D.	ns > Na
Answer» C. ns < Na and ps < Na

Discussion

21.	Identify the device based on the given symbol.
A.	N-channel JFET
B.	P-channel JFET
C.	N-channel MOSFET
D.	P-channel MOSFET
Answer» B. P-channel JFET

Discussion

22.	For an n-channel MOSFET, if conduction parameter (kn) is 0.249 mA/V2, gate to source voltage VQS is 2VTN where VTN = 0.75V. The current will be
A.	0.160 mA
B.	0.150 mA
C.	0.140 mA
D.	0.170 mA
Answer» D. 0.170 mA

Discussion

23.	Conductivity modulation is a phenomenon which occur in
A.	Power MOSFET
B.	GTO thyristor
C.	IGBT
D.	Power bipolar transistor
Answer» B. GTO thyristor

Discussion

24.	A high gain MESFET packaged device of case-to-channel thermal resistance of the device is 4.5°C/Watt provides 8 W RF output power taking 20 W DC power. What will be the channel temperature of the device if the case temperature of the device maintained at 55°C?
A.	109°C
B.	145°C
C.	59.5°C
D.	91°C
Answer» B. 145°C

Discussion

25.	In the circuits shown, the threshold voltage of each nMOS transistor is 0.6 V. Ignoring the effect of channel length modulation and body bias, the values of Vout1 and Vout2, respectively, in volts, are
A.	1.8 and 1.2
B.	2.4 and 2.4
C.	1.8 and 2.4
D.	2.4 and 1.2
Answer» D. 2.4 and 1.2

Discussion

26.	For an ideal MS contact between a metal and a P-type semi conductor. The relation between barrier height $q \; \phi_{B_pO}$is given by
A.	$q \; \phi_{B_pO}=q(\phi_m - \chi)$
B.	$q \; \phi_{B_pO}=\frac{Eg}{2}-q(\phi_m - \chi)$
C.	$q \; \phi_{B_pO}=q(\chi-\phi_m)$
D.	$q \; \phi_{B_pO}={Eg}-q(\phi_m - \chi)$
Answer» E.

Discussion

27.	Consider the following statements:1. Speed of operation of MOSFET is more than the speed of operation of SCR.2. SCRs have lower power loss than MOSFETs.3. The current in the conducting state can easily be controlled through the gate in SCR.4. MOSFET is not a current triggered device.The correct statements are
A.	1 and 4 only
B.	1 and 2 only
C.	2 and 3 only
D.	1, 2, 3 and 4
Answer» B. 1 and 2 only

Discussion

28.	A gate to drain-connected enhancement mode MOSFET is an example of
A.	an active load
B.	a switching device
C.	a three-terminal device
D.	a diode
Answer» B. a switching device

Discussion

29.	Assuming that transistors M1 and M2 are identical and have a threshold voltage of 1 V, the state of transistors M1 and M2 are respectively
A.	Saturation, Saturation
B.	Linear, Linear
C.	Linear, Saturation
D.	Saturation, Linear
Answer» D. Saturation, Linear

Discussion

30.	For a MOSFET satisfying the relationship VDS < VGS – VTH, where the drain voltage is VDS, the gate voltage is VGS, and the threshold voltage of the transistor is VTH, the transistor is said to operate in:
A.	Pinch off
B.	Saturation
C.	Cut off
D.	Triode region
Answer» E.

Discussion

31.	Directions:The following question consist of two statements, one labelled as ‘Statement (I)’ and the other as ‘Statement (II)’. You are to examine these two statements carefully and select the answers to these items using the code given below:Statement (I): The gate of MOSFET is insulated from the body of FET by deposition of a very thin fragile layer of SiO2 over the substrate.Statement (II): The device is therefore called as an insulated gate field-effect transistor (IGFET).Code
A.	Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)
B.	Both Statement (I and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I)
C.	Statement (I) is true but Statement (II) is false
D.	Statement (I) is false but Statement (II) is true
Answer» B. Both Statement (I and Statement (II) are individually true but Statement (II) is not the correct explanation of Statement (I)

Discussion

32.	In n-channel enhancement type MOSFET, as VGS is increased beyond the threshold level
A.	Drain current will decrease
B.	Density of free carriers in the induced channel will remain constant
C.	Density of free carriers in the induced channel will decrease
D.	Density of free carriers in the induced channel will increase
Answer» E.

Discussion

33.	In a circuit shown in the figure, the transistors M1 and M2 are operating in saturation. The channel length modulation coefficients of both the transistors are non-zero. The transconductance of the MOSFETs M1 and M2 are gm1 and gm2, respectively, and the internal resistance of the MOSFETs M1 and M2 are r01 and r02, respectively.Ignoring the body effect, the ac small-signal voltage gain (∂Vout / ∂Vin) of the circuit is:
A.	$- {g_{m2}}\left( {\frac{1}{{{g_{m1}}}}\|\|{r_{02}}} \right)$
B.	$- {g_{m2}}\left( {\frac{1}{{{g_{m1}}}}\|\|{r_{01}}\|\|{r_{02}}} \right)$
C.	$- {g_{m1}}\left( {\frac{1}{{{g_{m2}}}}\|\|{r_{01}}\|\|{r_{02}}} \right)$
D.	$- {g_{m2}}\left( {r_{01}\|\|{r_{02}}} \right)$
Answer» C. $- {g_{m1}}\left( {\frac{1}{{{g_{m2}}}}\|\|{r_{01}}\|\|{r_{02}}} \right)$

Discussion

34.	Match the following:a) The surface potential at the onset of strong inversioni) $-\sqrt{2{{\epsilon }_{s}}q{{N}_{A}}\left[ V\left( y \right)+2{{\psi }_{B}} \right]}$b) Charge in the inversion layerii) VD + 2ψBc) Charge in the depletion regioniii) $2{{\psi }_{B}}+\sqrt{\frac{2{{\epsilon }_{s}}q{{N}_{A}}\left( 2{{\psi }_{B}} \right)}{{{C}_{i}}}}$d) Threshold voltageiv) $-\left[ {{V}_{G}}-{{\psi }_{s}}\left( y \right) \right]{{C}_{i}}+\sqrt{2{{\epsilon }_{s}}q{{N}_{A}}\left[ V\left( y \right)+2{{\psi }_{B}} \right]}$
A.	a-i, b-ii, c-iii, d-iv
B.	a-ii, b-iv, c-i, d-iii
C.	a-iii, b-i, c-iv, d-ii
D.	a-iv, b-iii, c-ii, d-i
Answer» C. a-iii, b-i, c-iv, d-ii

Discussion

35.	For an n-channel silicon MOSFET with 10 nm gate oxide thickness, the substrate sensitivity (∂VT/∂\|VBS\|) is found to be 50 mV/V at a substance voltage \|VBS\| = 2 V, where VT is the threshold voltage of the MOSFET. Assume that, \|VBS\| >> 2ϕB, where qϕB is the separation between the Fermi energy level EF and the intrinsic level Ei in the bulk. Parameters given areElectron charge (q) = 1.6 × 10-19 CVacuum permittivity (ε0) = 8.85 × 10-12 F/mRelative permittivity of silicon (εSi) = 12Relative permittivity of oxide (εox) = 4The doping concentration of the substrate is
A.	7.37 × 1015 cm-3
B.	9.37 × 1015 cm-3
C.	2.37 × 1015 cm-3
D.	4.37 × 1015 cm-3
Answer» B. 9.37 × 1015 cm-3

Discussion

36.	Assertion (A) : The drain induced barrier lowering and channel length modulation are some of the short channel effects in MOSFETReason (R): The cut-off frequency of a MOSFET is independent of gate to source and gate to drain capacitance.
A.	Both (A) and (R) are true and (R) is the correct explanation of (A).
B.	Both (A) and (R) are true, but (R) is not the correct explanation of (A)
C.	(A) is true, but (R) is false
D.	(A) false, but (R) is true
Answer» D. (A) false, but (R) is true

Discussion

37.	For the given circuit, the Aspect ratio of M1 transistor is 20/0.5, ${I_{{D_1}}} = 200\mu A$, VTHO = 0.6 V, 2ϕF = 0.81 V, γ = 0.4 V2 and μnCox = 59.5 μA/V2. If Vin = 1.2 V, find the minimum value of aspect ratio of M2 transistor to remain saturated $\left( {\sqrt {10} = 3.16} \right)$
A.	92
B.	195
C.	280
D.	None of the above
Answer» E.

Discussion

38.	Match the columns.SymbolDevice name1. a. JFET2. b. BJT3. c. IGFET4. d. Vacuum tube
A.	1 - d, 2 - b, 3 - a, 4 - c
B.	1 - c, 2 - b, 3 - a, 4 - d
C.	1 - b, 2 - d, 3 - a, 4 - c
D.	1 - a, 2 - b, 3 - d, 4 - c
Answer» B. 1 - c, 2 - b, 3 - a, 4 - d

Discussion

39.	If n number of MOSFETs with identical W/L are connected in series, then equivalent W/L is given by:
A.	(W/L*n)
B.	(W/L)*n
C.	(W/L)*n2
D.	(W/L)/(n2)
Answer» B. (W/L)*n

Discussion

40.	An N-channel JFET has IDSS = 1 mA and VP = -8V. Its maximum transconductance is ________
A.	4S
B.	0.00025 S
C.	0.2 S
D.	0.001 S
Answer» C. 0.2 S

Discussion

41.	An n-channel enhancement mode MOSFET is biased at VGS > VTH and VDS > (VGS - VTH), where VGS is the gate-to-source voltage, VDS is the drain-to-source voltage and VTH is the threshold voltage. Considering channel length modulation effect to be significant, the MOSFET behaves as a
A.	voltage source with zero output impedance
B.	voltage source with non-zero output impedance
C.	current source with finite output impedance
D.	current source with infinite output impedance
Answer» D. current source with infinite output impedance

Discussion

42.	Directions: The below item consists of two statements, one labelled as the 'Statement (I)' and the other as 'Statement (II)'. Examine these two statements carefully and select the answers to these items using the codes given below:Statement (I): Conduction takes place in an enhancement MOSFET only for gate voltages below the threshold level.Statement (II): In an enhancement MOSFET, a channel of semiconductor of the same type as the source and drain is induced in the substrate by a positive voltage applied to the gate.Codes:
A.	Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I)
B.	Both Statement (I) and Statement (II) are individually true but Statement (II) is NOT the correct explanation of Statement (I)
C.	Statement (I) is true but Statement (II) is false
D.	Statement (I) is false but Statement (II) is true
Answer» E.

Discussion

43.	A MOSFET is biased at drain current of 0.5 mA. If μnCox = 100 μA/V2, W/L = 10 and λ = 0.1V-1, the intrinsic gain gmro will be.
A.	1
B.	10
C.	20
D.	0.05
Answer» D. 0.05

Discussion

44.	MOSFET operating in the saturation region behaves as:
A.	Voltage source
B.	Capacitor
C.	Current source
D.	Resistor
Answer» D. Resistor

Discussion

45.	THE_OUTPUT_CHARACTERISTICS_OF_A_MOSFET,_IS_A_PLOT_OF?$
A.	Id as a function of Vgs with Vds as a parameter
B.	Id as a function of Vds with Vgs as a parameter
C.	Ig as a function of Vgs with Vds as a parameter
D.	Ig as a function of Vds with Vgs as a parameter
Answer» C. Ig as a function of Vgs with Vds as a parameter

Discussion

46.	IN_THE_TRANSFER_CHARACTERISTICS_OF_A_MOSFET,_THE_THRESHOLD_VOLTAGE_IS_THE_MEASURE_OF_THE?$
A.	minimum voltage to induce a n-channel/p-channel for conduction
B.	minimum voltage till which temperature is constant
C.	minimum voltage to turn off the device
D.	none of the above mentioned is true
Answer» B. minimum voltage till which temperature is constant

Discussion

47.	In the internal structure of a MOSFET, a parasitic BJT exists between th?
A.	source & gate terminals
B.	source & drain terminals
C.	drain & gate terminals
D.	there is no parasitic BJT in MOSFET
Answer» C. drain & gate terminals

Discussion

48.	The controlling parameter in MOSFET is
A.	Vds
B.	Ig
C.	Vgs
D.	Is
Answer» C. Vgs

Discussion

49.	The arrow on the symbol of MOSFET indicates
A.	that it is a N-channel MOSFET
B.	the direction of electrons
C.	the direction of conventional current flow
D.	that it is a P-channel MOSFET
Answer» C. the direction of conventional current flow

Discussion

50.	Which of the following terminals does not belong to the MOSFET?
A.	Drain
B.	Gate
C.	Base
D.	Source
Answer» D. Source

Discussion

5.	Barrier height in a metal-semiconductor contact can easily be estimated from
A.	\(\left( {\frac{1}{C}} \right)\) versus V curve
B.	\(\left( {\frac{1}{{{C^2}}}} \right)\) versus V curve
C.	\(\left( {\frac{1}{C}} \right)\) versus I curve
D.	\(\left( {\frac{1}{{{C^2}}}} \right)\) versus I curve
Answer» C. \(\left( {\frac{1}{C}} \right)\) versus I curve

26.	For an ideal MS contact between a metal and a P-type semi conductor. The relation between barrier height \(q \; \phi_{B_pO}\)is given by
A.	\(q \; \phi_{B_pO}=q(\phi_m - \chi)\)
B.	\(q \; \phi_{B_pO}=\frac{Eg}{2}-q(\phi_m - \chi)\)
C.	\(q \; \phi_{B_pO}=q(\chi-\phi_m)\)
D.	\(q \; \phi_{B_pO}={Eg}-q(\phi_m - \chi)\)
Answer» E.

33.	In a circuit shown in the figure, the transistors M1 and M2 are operating in saturation. The channel length modulation coefficients of both the transistors are non-zero. The transconductance of the MOSFETs M1 and M2 are gm1 and gm2, respectively, and the internal resistance of the MOSFETs M1 and M2 are r01 and r02, respectively.Ignoring the body effect, the ac small-signal voltage gain (∂Vout / ∂Vin) of the circuit is:
A.	\(- {g_{m2}}\left( {\frac{1}{{{g_{m1}}}}\|\|{r_{02}}} \right)\)
B.	\(- {g_{m2}}\left( {\frac{1}{{{g_{m1}}}}\|\|{r_{01}}\|\|{r_{02}}} \right)\)
C.	\(- {g_{m1}}\left( {\frac{1}{{{g_{m2}}}}\|\|{r_{01}}\|\|{r_{02}}} \right)\)
D.	\(- {g_{m2}}\left( {r_{01}\|\|{r_{02}}} \right)\)
Answer» C. \(- {g_{m1}}\left( {\frac{1}{{{g_{m2}}}}\|\|{r_{01}}\|\|{r_{02}}} \right)\)

Explore topic-wise MCQs in Power Electronics.

For n-channel depletion MOSFET, the highest trans-conductance gain for a small signal is at

For a given n-MOS capacitor with substrate doping of NA=1017 cm−3, oxide thickness 20 nm, εox= 3.9 εo the values of oxide capacitance and flat band capacitance are respectively given as(use εo = 8.85×10−14 F cm−1):

Match List-I with List-II:List-I(Analog Devices)List-II(I / P impedances)a)BJTi)> 1012 Ωb)MOSFETii)> 1010 Ωc)JFETiii)> 108 Ωd)MESFETiv)< 104 ΩChoose the correct option from those given below:

An NMOS has Id = 5 mA, Vgs = 2 V, Vds = 4 V and Vt = 0.8 V. If the thickness of oxide is 500 A° , the aspect ratio of device at room temperature is

Barrier height in a metal-semiconductor contact can easily be estimated from

Both transistor T1 and T2 in figure have a threshold voltage of 1V. The device parameter K1 and K2 of T1 and T2 are 36 μAN2 and 9 μA/V2 respectively. The o/p voltage V0 is

Given, Vgs is the gate-source voltage, Vds is the drain source voltage, and Vth is the threshold voltage of an enhancement type NMOS transistor, the conditions for transistor to be biased in saturation are

Power dissipation is negligibly small in:

A standard CMOS inverter is designed with equal rise and fall times (βn = βp). If the width of the P MOS transistor in the inverter is increased, what would be the effect on the LOW noise margin (NML) and the HIGH noise margin (NMH) ?

A switched mode power supply operating at 20 kHz to 100 kHz range uses as the main switching element is __________.

In the given circuit, S1 switch remains closed and S2 remains open for a long time. At t = 0, S1 opens and S2 closes and remain in this position for a long time. Find drain current for t < 0 and t 0 respectively if, μnCox = 100 μA/V2 and Aspect ratio = 2.

MOSFET is a

A CMOS amplifier when compared to an N–channel MOSFET, has the advantage of

Body effect in MOSFET’s results in

In a MOSFET, SiO2 breaks down breaks down at electric field of the order of 5 × 106 V/cm. For a gate oxide thickness 1000 Angstroms and channel thickness of 2 μm, what is the maximum VGS it can withstand?

In the ______ region, a transistor act as closed switch.

In a p-type Si at 300 K and Na = 8 × 1015 cm-3, the variation of space-charge density in the semiconductor as a function of surface potential is plotted. Then select the true statement for the weak inversion region. Given that ps and ns are hole and electron concentrations at the surface.

Identify the device based on the given symbol.

For an n-channel MOSFET, if conduction parameter (kn) is 0.249 mA/V2, gate to source voltage VQS is 2VTN where VTN = 0.75V. The current will be

Conductivity modulation is a phenomenon which occur in

A high gain MESFET packaged device of case-to-channel thermal resistance of the device is 4.5°C/Watt provides 8 W RF output power taking 20 W DC power. What will be the channel temperature of the device if the case temperature of the device maintained at 55°C?

In the circuits shown, the threshold voltage of each nMOS transistor is 0.6 V. Ignoring the effect of channel length modulation and body bias, the values of Vout1 and Vout2, respectively, in volts, are

For an ideal MS contact between a metal and a P-type semi conductor. The relation between barrier height \(q \; \phi_{B_pO}\)is given by

A gate to drain-connected enhancement mode MOSFET is an example of

Assuming that transistors M1 and M2 are identical and have a threshold voltage of 1 V, the state of transistors M1 and M2 are respectively

For a MOSFET satisfying the relationship VDS < VGS­ – VTH, where the drain voltage is VDS, the gate voltage is VGS, and the threshold voltage of the transistor is VTH, the transistor is said to operate in:

In n-channel enhancement type MOSFET, as VGS is increased beyond the threshold level

Assertion (A) : The drain induced barrier lowering and channel length modulation are some of the short channel effects in MOSFETReason (R): The cut-off frequency of a MOSFET is independent of gate to source and gate to drain capacitance.

For the given circuit, the Aspect ratio of M1 transistor is 20/0.5, \({I_{{D_1}}} = 200\mu A\), VTHO = 0.6 V, 2ϕF = 0.81 V, γ = 0.4 V2 and μnCox = 59.5 μA/V2. If Vin = 1.2 V, find the minimum value of aspect ratio of M2 transistor to remain saturated \(\left( {\sqrt {10} = 3.16} \right)\)

Match the columns.SymbolDevice name1. a. JFET2. b. BJT3. c. IGFET4. d. Vacuum tube

If n number of MOSFETs with identical W/L are connected in series, then equivalent W/L is given by:

An N-channel JFET has IDSS = 1 mA and VP = -8V. Its maximum transconductance is ________

An n-channel enhancement mode MOSFET is biased at VGS > VTH and VDS > (VGS - VTH), where VGS is the gate-to-source voltage, VDS is the drain-to-source voltage and VTH is the threshold voltage. Considering channel length modulation effect to be significant, the MOSFET behaves as a

A MOSFET is biased at drain current of 0.5 mA. If μnCox = 100 μA/V2, W/L = 10 and λ = 0.1V-1, the intrinsic gain gmro will be.

MOSFET operating in the saturation region behaves as:

THE_OUTPUT_CHARACTERISTICS_OF_A_MOSFET,_IS_A_PLOT_OF?$

IN_THE_TRANSFER_CHARACTERISTICS_OF_A_MOSFET,_THE_THRESHOLD_VOLTAGE_IS_THE_MEASURE_OF_THE?$

In the internal structure of a MOSFET, a parasitic BJT exists between th?

The controlling parameter in MOSFET is

The arrow on the symbol of MOSFET indicates

Which of the following terminals does not belong to the MOSFET?

For a MOSFET satisfying the relationship VDS < VGS – VTH, where the drain voltage is VDS, the gate voltage is VGS, and the threshold voltage of the transistor is VTH, the transistor is said to operate in: