Explore topic-wise MCQs in Active Filter Circuits.

This section includes 65 Mcqs, each offering curated multiple-choice questions to sharpen your Active Filter Circuits knowledge and support exam preparation. Choose a topic below to get started.

1.

Which of the following require(s) interfacing circuitry?

A. Keyboards
B. Video terminals
C. Printers
D. All of the above
Answer» E.
2.

For transistor transistor logic (TTL) circuits, ________ is a mark and ________ is a space.

A. 12 V, 0 V
B. 0 V, 12 V
C. 0 V, 5 V
D. 5 V, 0 V
Answer» E.
3.

For the RS-232C circuit, ________ is a mark and ________ is a space.

A. 12 V, –12 V
B. –12 V, 12 V
C. 5 V, 0 V
D. –5 V, 0 V
Answer» C. 5 V, 0 V
4.

In interfacing circuitry, a receiver provides ________ input impedance to minimize loading of the input signal.

A. high
B. medium
C. low
D. zero
Answer» B. medium
5.

An input at a frequency of 1070 Hz will drive the decoder output voltage to ________.

A. –5 V
B. 14 V
C. –5 V and 14 V
D. None of the above
Answer» C. –5 V and 14 V
6.

The free-running frequency of a 565 FSK decoder is adjusted with ________.

A. external capacitors
B. an external resistor
C. an external RC network
D. an internal clock
Answer» C. an external RC network
7.

A phase-locked loop (PLL) is an electronic circuit that consists of ________.

A. a phase detector
B. a low-pass filter
C. a voltage-controlled oscillator
D. All of the above
Answer» E.
8.

When the loop is in lock in a PLL, the input frequency is ________ the output frequency from the VCO.

A. the same as
B. greater than
C. smaller than
D. None of the above
Answer» B. greater than
9.

In the frequency-shift keyed (FSK) signal decoder, the RC ladder filter is used to ________.

A. remove the difference frequency component
B. remove the sum frequency component
C. remove both the difference and the sum frequency components
D. None of the above
Answer» C. remove both the difference and the sum frequency components
10.

The frequency of the 566 VCO is set by ________.

A. an external resistor
B. an external capacitor
C. both an external resistor and an external capacitor
D. None of the above
Answer» D. None of the above
11.

A voltage-controlled oscillator (VCO) is a circuit that provides a ________ output signal.

A. zero
B. varying
C. constant
D. None of the above
Answer» C. constant
12.

Time periods for monostable operation of the 555 timer can range from ________ to ________, making this IC useful for a range of applications.

A. picoseconds, nanoseconds
B. nanoseconds, milliseconds
C. microseconds, many seconds
D. None of the above
Answer» D. None of the above
13.

In astable operation of the 555 timer, the lower and upper peaks of the charging/discharging external capacitor are ________ to ________.

A. –VCC, VCC
B. –0.5 VCC, 0.5 VCC
C. 1/3 VCC, 1/2 VCC
D. 1/3 VCC, 2/3 VCC
Answer» E.
14.

In astable operation of the 555 timer, the external capacitor, C, is charged through external resistor(s) ________ and is discharged through resistor(s) ________.

A. RA, RA
B. RB, RA
C. RA and RB, RB
D. RB, RA and RB
Answer» D. RB, RA and RB
15.

In a 555 timer, a series connection of three resistors sets the reference voltage levels to the two comparators at ________ and ________.

A. 2VCC / 3, VCC / 3
B. VCC / 2, VCC / 4
C. VCC, VCC / 2
D. VCC, VCC
Answer» B. VCC / 2, VCC / 4
16.

The conversion resolution of an 8-stage counter operating an 8-stage ladder network using a reference voltage of 5 V is ________.

A. 0.0195 mV
B. 0.195 mV
C. 1.95 mV
D. 19.5 mV
Answer» E.
17.

In a ladder-network conversion, the ________ circuit provides a signal to stop the counter when the staircase voltage rises above the input voltage.

A. control logic
B. comparator
C. ladder-network
D. None of the above
Answer» C. ladder-network
18.

In a ladder-network conversion, ________ ladder stages provide ________ voltage resolution.

A. more, greater
B. more, smaller
C. fewer, greater
D. None of the above
Answer» B. more, smaller
19.

In the operation of two 311 voltage comparators as the voltage window detector, a low output indicates that the input is ________.

A. above the higher reference voltage
B. below the lower reference voltage
C. either above the higher reference voltage or below the lower reference voltage
D. within the high and the low reference voltages
Answer» D. within the high and the low reference voltages
20.

When the input to the 311 voltage comparator is ________ value, the output is ________ if the inverting input is connected to ground.

A. any negative, low
B. any positive, low
C. any positive, high
D. None of the above
Answer» C. any positive, high
21.

In the operation of two 311 voltage comparators as the voltage window detector, a high output indicates that the input is ________.

A. above the higher reference voltage
B. below the lower reference voltage
C. either above the higher reference voltage or below the lower reference voltage
D. within the high and the low reference voltages
Answer» E.
22.

The 311 voltage comparator can operate from ________.

A. dual power supplies of 15 V
B. a single +5 V supply
C. either a dual power supply of 15 V or a single +5 V supply
D. None of the above
Answer» D. None of the above
23.

In a comparator, the reference voltage is connected to ________ input terminal and the input signal is applied to ________ input terminal.

A. only the minus, only the plus
B. only the plus, only the minus
C. either the plus or minus, the other
D. None of the above
Answer» D. None of the above
24.

In a comparator, the level of the reference voltage must be ________.

A. negative
B. positive
C. zero
D. All of the above
Answer» E.
25.

A comparator circuit accepts input of ________ voltages and provides a ________ output that indicates when one input is less than or greater than the second.

A. linear, digital
B. linear, linear
C. digital, linear
D. None of the above
Answer» B. linear, linear
26.

Determine the free-running frequency when R3 is set to 2.5 k.

A. 19.7 kHz
B. 32.5 kHz
C. 116.39 kHz
D. 212.9 kHz
Answer» D. 212.9 kHz
27.

Which of the following best describes limitations for the 566 VCO?

A. [A].
B. [B].
C. fo < 1 MHz
D. All of the above
Answer» E.
28.

If |x2 - 3x + 2| > x2 - 3x + 2, then which one of the following is correct?

A. x ≤ 1 or x ≥ 2
B. 1 ≤ x ≤ 2
C. 1 < x < 2
D. x is any real value except 3 and 4
Answer» D. x is any real value except 3 and 4
29.

If the system of equationsx + y + z = 5x + 2y + 3z = 9x + 3y + αz = βhas infinitely many solutions, then β – α equals:

A. 21
B. 8
C. 18
D. 5
Answer» C. 18
30.

Every extreme point of the convex set all feasible solutions of the system AX = b is a -

A. Feasible solution
B. Basic feasible solution
C. Optimum solution
D. None of these
Answer» C. Optimum solution
31.

If |2x - 3| < |x + 5| then x belongs to -

A. (-3, 5)
B. (5, 9)
C. \(\left(-\dfrac{2}{3}, 8\right)\)
D. \(\left(-8, \dfrac{2}{3}\right)\)
Answer» D. \(\left(-8, \dfrac{2}{3}\right)\)
32.

If |a| denotes the absolute value of an integer, then which of the following are correct?1. |ab| = |a| |b|2. |a + b| ≤ |a| + |b|3. |a - b| ≥ ||a| - |b||Select the correct answer using the code given below.

A. 1 and 2 only
B. 2 and 3 only
C. 1 and 3 only
D. 1, 2 and 3
Answer» E.
33.

If the system of linear equations2x + 2y + 3z = a3x – y + 5z = bx – 3y + 2z = cWhere a, b, c are non-zero real numbers, has more than one solution, then:

A. b – c + a = 0
B. b – c – a = 0
C. a + b + c = 0
D. b + c – a = 0
Answer» C. a + b + c = 0
34.

Determine the free-running frequency when R 3 is set to 2.5 k .

A. 19.7 kHz
B. 32.5 kHz
C. 116.39 kHz
D. 212.9 kHz
Answer» D. 212.9 kHz
35.

Calculate the frequency of this circuit.

A. 635 Hz
B. 450 Hz
C. 228 Hz
D. 128 Hz
Answer» E.
36.

Which of the following frequencies is associated with the 565 frequency-shift keyed decoder?

A. 1070 Hz
B. 1270 Hz
C. Both 1070 Hz and 1270 Hz
D. None of the above
Answer» D. None of the above
37.

The timing components for a PLL are 15 k and 220 pF. Calculate the free-running frequency.

A. 90.91 kHz
B. 136.36 kHz
C. 156.1 kHz
D. 181.8 kHz
Answer» B. 136.36 kHz
38.

What is the voltage resolution of an 8-stage ladder network?

A. V ref /128
B. V ref /256
C. V ref /512
D. V ref /1024
Answer» C. V ref /512
39.

Which of the following best describes the output of a 566 voltage-controlled oscillator?

A. Square-wave
B. Triangular-wave
C. Both square- and triangular-wave
D. None of the above
Answer» D. None of the above
40.

Which of the following circuits is (are) linear/digital ICs?

A. Comparators
B. Timers
C. Voltage-controlled oscillators
D. All of the above
Answer» E.
41.

Which of the following devices is (are) a component of a digital-to-analog converter (DAC)?

A. Integrator
B. Comparator
C. Digital counter
D. All of the above
Answer» E.
42.

The 555 timer IC is made up of a combination of linear comparators and digital flip-flops.

A. True
B. False
C. -
D. -
Answer» B. False
43.

How many comparators does a 339 IC contain?

A. 4
B. 3
C. 2
D. 1
Answer» B. 3
44.

When is the counter set to zero in the dual-slope method of conversion?

A. Prior to the charging of the capacitor of the integrator
B. While the capacitor is being charged
C. At the end of the charging of the capacitor
D. During the discharging of the capacitor
Answer» D. During the discharging of the capacitor
45.

This circuit is an example of a ________.

A. comparator
B. 555 timer
C. D to A converter
D. ladder network
Answer» E.
46.

What is (are) the input(s) to the comparator in the ladder-network conversion of an ADC?

A. Staircase voltage
B. Analog input voltage
C. Both staircase and analog input voltage
D. None of the above
Answer» D. None of the above
47.

How many Vcc connections does the 565 PLL use?

A. 0
B. 1
C. 2
D. 3
Answer» D. 3
48.

At which of the following period(s) is the counter advanced (incremented) in dual-slope conversion?

A. During the charging of the capacitor of the integrator
B. During the discharging of the capacitor of the integrator
C. During both the charging and discharging of the capacitor of the integrator
D. None of the above
Answer» C. During both the charging and discharging of the capacitor of the integrator
49.

What is (are) the level(s) of the input voltage to a ladder-network conversion?

A. 0
B. V ref
C. 0 V or V ref
D. None of the above
Answer» D. None of the above
50.

Determine the free-running frequency for this circuit.

A. 32.5 kHz
B. 53.33 kHz
C. 533.3 kHz
D. 5.3 MHz
Answer» C. 533.3 kHz