Explore topic-wise MCQs in 8051 Microcontroller.

This section includes 19 Mcqs, each offering curated multiple-choice questions to sharpen your 8051 Microcontroller knowledge and support exam preparation. Choose a topic below to get started.

1.

WHAT_WILL_HAPPEN_IN_THAT_CONDITION,_IF_AN_INTERRUPT_OCCURS_WHILE_THE_MICROCONTROLLER_IS_SERVING_ANY_OTHER_INTERRUPT??$

A. both the interrupts will be handled simultaneously
B. the interrupt which is being done first will be served first
C. the interrupt that is more priority in the interrupt vector table will be served first
D. the interrupt having low priority in the interrupt vector table will be served first
Answer» D. the interrupt having low priority in the interrupt vector table will be served first
Discussion
2.

WHAT_IS_THE_CORRECT_ORDER_OF_PRIORITY_THAT_IS_SET_AFTER_A_CONTROLLER_GETS_RESET??$

A. TxD/RxD > T1 > T0 >EX1 > EX0
B. TxD/RxD < T1 < T0<EX1 < EX0
C. EX0 > T0 > EX1 >T1> TxD/RxD
D. EX0 < T0 < EX1 < T1 < TxD/RxD
Answer» D. EX0 < T0 < EX1 < T1 < TxD/RxD
Discussion
3.

BY_DEFAULT,_INT0-INT2_INTERRUPTS_ARE??$

A. edge triggered
B. level triggered
C. all of the mentioned
D. none of the mentioned
Answer» C. all of the mentioned
Discussion
4.

What is the disadvantage of a level triggered pulse?

A. a constant pulse is to be maintained for a greater span of time
B. difficult to analyze its effects
C. it is difficult to produce
D. another interrupt may be caused if the signal is still low before the completion of the last instruction
Answer» E.
Discussion
5.

Which register is responsible for handling all the external hardware interrupts?

A. TIMSK
B. GICR
C. MCUCR
D. IVCE
Answer» C. MCUCR
Discussion
6.

Which register is used to make the pulse a level or an edge triggered pulse?

A. TCON
B. IE
C. IPR
D. SCON
Answer» B. IE
Discussion
7.

External hardware interrupts are assigned to which pins of the atmega32?

A. PORTD.2
B. PORTD.3
C. All of the mentioned
D. None of the mentioned
Answer» E.
Discussion
8.

Why normally LJMP instructions are the topmost lines of the ISR?

A. so as to jump to some other location where there is a wider space of memory available to write the codes
B. so as to avoid overwriting of other interrupt instructions
C. all of the mentioned
D. none of the mentioned
Answer» D. none of the mentioned
Discussion
9.

Is the same address is assigned for the timer0 and timer1 overflow flag in the interrupt vector table of the interrupts?

A. true
B. false
C. can’t be determined
D. depends on the situation
Answer» C. can‚Äö√Ñ√∂‚àö√ë‚àö¬•t be determined
Discussion
10.

Which of the following combination is the best to enable the external hardware interrupt 0 of the IE register (assuming initially all bits of the IE register are zero)?

A. EX0=1
B. EA=1
C. any of the mentioned
D. EX0=1 & EA=1
Answer» E.
Discussion
11.

What is the address in the interrupt service routine assigned for the timer0 overflow flag?

A. 0012h
B. 000Ah
C. 0016h
D. all of the mentioned
Answer» D. all of the mentioned
Discussion
12.

Which bit of the IE register is used to enable TxD/RxD interrupt?

A. IE.D5
B. IE.D2
C. IE.D3
D. IE.D4
Answer» E.
Discussion
13.

In AVR what is the ISR address for an external hardware interrupt?

A. 0002h
B. 0004h
C. 0006h
D. all of the mentioned
Answer» E.
Discussion
14.

Which pin of the external hardware is said to exhibit INT0 interrupt?

A. pin no 10
B. pin no 11
C. pin no 12
D. pin no 13
Answer» D. pin no 13
Discussion
15.

Why RETI instruction is used after an ISR?

A. because it returns with carry
B. because it returns to the main program with all the flags of the SREG raised
C. because it returns to the main program after clearing the roll over flag of the interrupt so that the interrupt can be caused again
D. none of the mentioned
Answer» D. none of the mentioned
Discussion
16.

After RETI instruction is executed then the pointer will move to which location in the program?

A. next interrupt of the interrupt vector table
B. next instruction of the program after the IE instruction
C. next instruction after the RETI in the memory
D. none of the mentioned
Answer» C. next instruction after the RETI in the memory
Discussion
17.

TIMSK register is used for?

A. knowing the status of the timer count
B. used for masking the interrupts flags of the Timer0, Timer1 and Timer2
C. it is used for enabling all the timer interrupts
D. it is used for resetting the value of the interrupts
Answer» C. it is used for enabling all the timer interrupts
Discussion
18.

What are the contents of the IE register, when the interrupt of the memory location 0x00 is caused?

A. 0xFFH
B. 0x00H
C. 0x10H
D. 0xF0H
Answer» C. 0x10H
Discussion
19.

When an interrupt is enabled, then where does the pointer moves immediately after this interrupt has occurred?

A. to the next instruction which is to be executed
B. to the first instruction of ISR
C. to the first location of the memory called the interrupt vector table
D. to the end of the program
Answer» D. to the end of the program
Discussion