MCQOPTIONS
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MCQOPTIONS
This section includes 242 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science Engineering (CSE) knowledge and support exam preparation. Choose a topic below to get started.
| 51. |
The ROM is a |
| A. | sequential circuit |
| B. | combinational circuit |
| C. | magnetic circuit |
| D. | static circuit |
| Answer» C. magnetic circuit | |
| 52. |
Since, ROM has the capability to read the information only then also it has been designed, why? |
| A. | for controlling purpose |
| B. | for loading purpose |
| C. | for booting purpose |
| D. | for erasing purpose |
| Answer» D. for erasing purpose | |
| 53. |
ROM is made up of |
| A. | nand and or gates |
| B. | nor and decoder |
| C. | decoder and or gates |
| D. | nand and decoder |
| Answer» D. nand and decoder | |
| 54. |
Which of the following has the capability to store the information permanently? |
| A. | ram |
| B. | rom |
| C. | storage cells |
| D. | both ram and rom |
| Answer» C. storage cells | |
| 55. |
A ROM is defined as |
| A. | read out memory |
| B. | read once memory |
| C. | read only memory |
| D. | read one memory |
| Answer» D. read one memory | |
| 56. |
The evolution of PLD began with |
| A. | erom |
| B. | ram |
| C. | prom |
| D. | eeprom |
| Answer» B. ram | |
| 57. |
CD-ROM refers to |
| A. | floppy disk |
| B. | compact disk-read only memory |
| C. | compressed disk-read only memory |
| D. | compressed disk- random access memory |
| Answer» C. compressed disk-read only memory | |
| 58. |
The full form of PLD is |
| A. | programmable large device |
| B. | programmable long device |
| C. | programmable logic device |
| D. | programmable lengthy device |
| Answer» D. programmable lengthy device | |
| 59. |
Data stored in an electronic memory cell can be accessed at random and on demand using |
| A. | memory addressing |
| B. | direct addressing |
| C. | indirect addressing |
| D. | control unit |
| Answer» C. indirect addressing | |
| 60. |
VLSI chip utilizes |
| A. | nmos |
| B. | cmos |
| C. | bjt |
| D. | all of the mentioned |
| Answer» E. | |
| 61. |
A large memory is compressed into a small one by using |
| A. | lsi semiconductor |
| B. | vlsi semiconductor |
| C. | cdr semiconductor |
| D. | ssi semiconductor |
| Answer» C. cdr semiconductor | |
| 62. |
Which one of the following has capability to store data in extremely high densities? |
| A. | register |
| B. | capacitor |
| C. | semiconductor |
| D. | flip-flop |
| Answer» D. flip-flop | |
| 63. |
A minute magnetic toroid is also called as |
| A. | large memory |
| B. | small memory |
| C. | core memory |
| D. | both small and large memory |
| Answer» D. both small and large memory | |
| 64. |
The very first computer memory consisted of |
| A. | a small display |
| B. | a large memory storage equipment |
| C. | an automatic keyboard input |
| D. | an automatic mouse input |
| Answer» C. an automatic keyboard input | |
| 65. |
A register file holds |
| A. | a large number of word of information |
| B. | a small number of word of information |
| C. | a large number of programs |
| D. | a modest number of words of information |
| Answer» E. | |
| 66. |
A register is able to hold |
| A. | data |
| B. | word |
| C. | nibble |
| D. | both data and word |
| Answer» C. nibble | |
| 67. |
The instruction used in a program for executing them is stored in the |
| A. | cpu |
| B. | control unit |
| C. | memory |
| D. | microprocessor |
| Answer» D. microprocessor | |
| 68. |
Memory is a/an |
| A. | device to collect data from other computer |
| B. | block of data to keep data separately |
| C. | indispensable part of computer |
| D. | device to connect through all over the world |
| Answer» D. device to connect through all over the world | |
| 69. |
The data written in flip-flop remains stored as long as |
| A. | d.c. power is supplied |
| B. | d.c. power is removed |
| C. | a.c. power is supplied |
| D. | a.c. power is removed |
| Answer» B. d.c. power is removed | |
| 70. |
The magnetic core memories have been replaced by semiconductor RAMs, why? |
| A. | semiconductor rams are highly flexible |
| B. | semiconductor rams have highest storing capacity |
| C. | semiconductor rams are smaller in size |
| D. | all of the mentioned |
| Answer» E. | |
| 71. |
Which one of the following is volatile in nature? |
| A. | rom |
| B. | erom |
| C. | prom |
| D. | ram |
| Answer» E. | |
| 72. |
Static RAM employs |
| A. | bjt or mosfet |
| B. | fet or jfet |
| C. | capacitor or bjt |
| D. | bjt or mos |
| Answer» E. | |
| 73. |
Dynamic RAM employs |
| A. | capacitor or mosfet |
| B. | fet or jfet |
| C. | capacitor or bjt |
| D. | bjt or mos |
| Answer» B. fet or jfet | |
| 74. |
How many types of RAMs are? |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» B. 3 | |
| 75. |
Computers invariably use RAM for |
| A. | high complexity |
| B. | high resolution |
| C. | high speed main memory |
| D. | high flexibility |
| Answer» D. high flexibility | |
| 76. |
Which of the following control signals are selected for read and write operations in a RAM? |
| A. | data buffer |
| B. | chip select |
| C. | read and write |
| D. | memory |
| Answer» D. memory | |
| 77. |
If a RAM chip has n address input lines then it can access memory locations upto |
| A. | 2(n-1) |
| B. | 2(n+1) |
| C. | 2n |
| D. | 22n |
| Answer» D. 22n | |
| 78. |
RAM is also known as |
| A. | rwm |
| B. | mbr |
| C. | mar |
| D. | rom |
| Answer» B. mbr | |
| 79. |
The n-bit address is placed in the |
| A. | mbr |
| B. | mar |
| C. | ram |
| D. | rom |
| Answer» C. ram | |
| 80. |
The chip by which both the operation of read and write is performed |
| A. | ram |
| B. | rom |
| C. | prom |
| D. | eprom |
| Answer» B. rom | |
| 81. |
What are the typical values of tOE? |
| A. | 10 to 20 ns for bipolar |
| B. | 25 to 100 ns for nmos |
| C. | 12 to 50 ns for cmos |
| D. | all of the mentioned |
| Answer» E. | |
| 82. |
Which of the following is not a type of memory? |
| A. | ram |
| B. | fprom |
| C. | eeprom |
| D. | rom |
| Answer» D. rom | |
| 83. |
                         method is used in centralized systems to perform out of order execution. |
| A. | scorecard |
| B. | score boarding |
| C. | optimizing |
| D. | redundancy |
| Answer» C. optimizing | |
| 84. |
The time lost due to the branch instruction is often referred to as |
| A. | latency |
| B. | delay |
| C. | branch penalty |
| D. | none of the mentioned |
| Answer» D. none of the mentioned | |
| 85. |
The situation wherein the data of operands are not available is called |
| A. | data hazard |
| B. | stock |
| C. | deadlock |
| D. | structural hazard |
| Answer» B. stock | |
| 86. |
In this technique, a simple fault manifests into multiple N faults. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 87. |
For a NAND gate, struck-at 1 fault in second input line cannot be detected if |
| A. | q is 1 |
| B. | q is 0 |
| C. | q changes from 1 to 0 |
| D. | q changes from 0 to 1 |
| Answer» C. q changes from 1 to 0 | |
| 88. |
In this iterative test generation method, sequential logic is |
| A. | used in the same pattern |
| B. | converted to test logic |
| C. | converted to combinational logic |
| D. | converted to asynchronous logic |
| Answer» D. converted to asynchronous logic | |
| 89. |
Which method is very time consuming? |
| A. | d-algorithm |
| B. | iterative test generation |
| C. | pseudo exhaustive method |
| D. | test generation pattern |
| Answer» C. pseudo exhaustive method | |
| 90. |
Iterative test generation method suits for circuits with |
| A. | no feedback loops |
| B. | few feedback loops |
| C. | more feedback loops |
| D. | negative feedback loops only |
| Answer» C. more feedback loops | |
| 91. |
In an OR gate, if A and B are two inputs and there is struck at 1 fault in B path, then output will be |
| A. | a |
| B. | 0 |
| C. | 1 |
| D. | b’ |
| Answer» D. b’ | |
| 92. |
Which contributes to the necessary delay element? |
| A. | flip-flops |
| B. | circuit propagation elements |
| C. | negative feedback path |
| D. | shift registers |
| Answer» C. negative feedback path | |
| 93. |
Which is the delay elements for clocked system? |
| A. | and gates |
| B. | or gates |
| C. | flip-flops |
| D. | multiplexers |
| Answer» D. multiplexers | |
| 94. |
Outputs are functions of |
| A. | present state |
| B. | previous state |
| C. | next state |
| D. | present and next state |
| Answer» B. previous state | |
| 95. |
Which constitutes the test vectors in sequential circuits? |
| A. | feedback variables |
| B. | delay factors |
| C. | test patterns |
| D. | all input combinations |
| Answer» B. delay factors | |
| 96. |
Sequential circuit includes |
| A. | delays |
| B. | feedback |
| C. | delays and feedback from input to output |
| D. | delays and feedback from output to input |
| Answer» E. | |
| 97. |
A user doesn’t want to use the IF statement for detecting clock edge. It is possible to do the same by using any other keyword in VHDL. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 98. |
Sequential circuits are represented as |
| A. | finite state machine |
| B. | infinite state machine |
| C. | finite synchronous circuit |
| D. | infinite asynchronous circuit |
| Answer» B. infinite state machine | |
| 99. |
Which of the following attribute is generally used in implementation of sequential circuits? |
| A. | ‘stable |
| B. | ‘length |
| C. | ‘last_event |
| D. | ‘event |
| Answer» E. | |
| 100. |
Which of the following line is correct for detecting positive edge of a clock? |
| A. | if (clk’event and clk = ‘0’) |
| B. | if (clk’event and clk = ‘1’) |
| C. | if (clk’event or clk = ‘0’) |
| D. | if (clk’event or clk = ‘1’) |
| Answer» C. if (clk’event or clk = ‘0’) | |