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This section includes 242 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science Engineering (CSE) knowledge and support exam preparation. Choose a topic below to get started.
| 151. |
How many OR gates are required for a Decimal-to- bcd encoder? |
| A. | 2 |
| B. | 10 |
| C. | 3 |
| D. | 4 |
| Answer» E. | |
| 152. |
If we record any music in any recorder, such types of process is called |
| A. | multiplexing |
| B. | encoding |
| C. | decoding |
| D. | demultiplexing |
| Answer» C. decoding | |
| 153. |
How is an encoder different from a decoder? |
| A. | the output of an encoder is a binary code for 1-of-n input |
| B. | the output of a decoder is a binary code for 1-of-n input |
| C. | the output of an encoder is a binary code for n-of-1 output |
| D. | the output of a decoder is a binary code for n-of-1 output |
| Answer» B. the output of a decoder is a binary code for 1-of-n input | |
| 154. |
How many outputs will a decimal-to-BCD encoder have? |
| A. | 4 |
| B. | 8 |
| C. | 12 |
| D. | 16 |
| Answer» B. 8 | |
| 155. |
How many inputs will a decimal-to-BCD encoder have? |
| A. | 4 |
| B. | 8 |
| C. | 10 |
| D. | 16 |
| Answer» D. 16 | |
| 156. |
TTL 74LS85 is a |
| A. | 1-bit digital comparator |
| B. | 4-bit magnitude comparator |
| C. | 8-bit magnitude comparator |
| D. | 8-bit word comparator |
| Answer» C. 8-bit magnitude comparator | |
| 157. |
The purpose of a Digital Comparator is |
| A. | to convert analog input into digital |
| B. | to create different outputs |
| C. | to add a set of different numbers |
| D. | to compare a set of variables or unknown numbers |
| Answer» E. | |
| 158. |
An identify comparator is defined as a digital comparator which has |
| A. | only one output terminal |
| B. | two output terminals |
| C. | three output terminals |
| D. | no output terminal |
| Answer» B. two output terminals | |
| 159. |
A magnitude comparator is defined as a digital comparator which has |
| A. | only one output terminal |
| B. | two output terminals |
| C. | three output terminals |
| D. | no output terminal |
| Answer» D. no output terminal | |
| 160. |
How many types of digital comparators are? |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» C. 3 | |
| 161. |
A procedure that specifies finite set of steps is called |
| A. | algorithm |
| B. | flow chart |
| C. | chart |
| D. | venn diagram |
| Answer» B. flow chart | |
| 162. |
A circuit that compares two numbers and determine their magnitude is called |
| A. | height comparator |
| B. | size comparator |
| C. | comparator |
| D. | magnitude comparator |
| Answer» E. | |
| 163. |
Which one is a basic comparator? |
| A. | xor |
| B. | xnor |
| C. | and |
| D. | nand |
| Answer» B. xnor | |
| 164. |
In a comparator, if we get input as A>B then the output will be |
| A. | 1 |
| B. | 0 |
| C. | a |
| D. | b |
| Answer» B. 0 | |
| 165. |
How many inputs are required for a digital comparator? |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» B. 2 | |
| 166. |
If two numbers are not equal then binary variable will be |
| A. | 0 |
| B. | 1 |
| C. | a |
| D. | b |
| Answer» B. 1 | |
| 167. |
One that is not the outcome of magnitude comparator is |
| A. | a > b |
| B. | a – b |
| C. | a < b |
| D. | a = b |
| Answer» C. a < b | |
| 168. |
All the comparisons made by comparator is done using |
| A. | 1 circuit |
| B. | 2 circuits |
| C. | 3 circuits |
| D. | 4 circuits |
| Answer» B. 2 circuits | |
| 169. |
The result of 0*1 in binary is |
| A. | 0 |
| B. | 1 |
| C. | invalid |
| D. | 10 |
| Answer» B. 1 | |
| 170. |
The result that is smaller than the smallest number obtained is referred to as |
| A. | nan |
| B. | underflow |
| C. | smallest |
| D. | mantissa |
| Answer» C. smallest | |
| 171. |
The number of sign bits in a 32-bit IEEE format is |
| A. | 1 |
| B. | 11 |
| C. | 9 |
| D. | 23 |
| Answer» B. 11 | |
| 172. |
What do you call the intermediate terms in binary multiplication? |
| A. | multipliers |
| B. | mid terms |
| C. | partial products |
| D. | multiplicands |
| Answer» D. multiplicands | |
| 173. |
The multiplication of 110 * 111 is performed. What is a general term used for 111? |
| A. | dividend |
| B. | quotient |
| C. | multiplicand |
| D. | multiplier |
| Answer» E. | |
| 174. |
The addition 1+1 gives 0 as a result. |
| A. | true |
| B. | false |
| Answer» B. false | |
| 175. |
How many AND, OR and EXOR gates are required for the configuration of full adder? |
| A. | 1, 2, 2 |
| B. | 2, 1, 2 |
| C. | 3, 1, 2 |
| D. | 4, 0, 1 |
| Answer» C. 3, 1, 2 | |
| 176. |
The flag bits in an ALU is defined as |
| A. | the total number of registers |
| B. | the status bit conditions |
| C. | the total number of control lines |
| D. | all of the mentioned |
| Answer» C. the total number of control lines | |
| 177. |
If the two numbers include a sign bit in the highest order position, the bit conditions of interest are the sign of the result, a zero indication and |
| A. | an underflow condition |
| B. | a neutral condition |
| C. | an overflow condition |
| D. | one indication |
| Answer» D. one indication | |
| 178. |
A digital system consists of            types of circuits. |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» B. 3 | |
| 179. |
The design of an ALU is based on |
| A. | sequential logic |
| B. | combinational logic |
| C. | multiplexing |
| D. | de-multiplexing |
| Answer» C. multiplexing | |
| 180. |
If the two numbers are unsigned, the bit conditions of interest are the              carry and a possible            result. |
| A. | input, zero |
| B. | output, one |
| C. | input, one |
| D. | output, zero |
| Answer» E. | |
| 181. |
In a sequential circuit, the output at any time depends only on the input values at that time. |
| A. | past output values |
| B. | intermediate values |
| C. | both past output and present input |
| D. | present input values |
| Answer» D. present input values | |
| 182. |
The basic building blocks of the arithmetic unit in a digital computers are |
| A. | subtractors |
| B. | adders |
| C. | multiplexer |
| D. | comparator |
| Answer» C. multiplexer | |
| 183. |
The carry propagation can be expressed as |
| A. | cp = ab |
| B. | cp = a + b |
| C. | all but y0 are low |
| D. | all but y0 are high |
| Answer» C. all but y0 are low | |
| 184. |
For the device shown here, assume the D input is LOW, both S inputs are LOW and the input is LOW. What is the status of the Y’ outputs? |
| A. | d |
| B. | a |
| C. | c |
| D. | b |
| Answer» B. a | |
| 185. |
What type of logic circuit is represented by the figure shown below? |
| A. | xor |
| B. | xnor |
| C. | and |
| D. | xand |
| Answer» C. and | |
| 186. |
The device shown here is most likely a |
| A. | a |
| B. | b |
| C. | c |
| D. | d |
| Answer» E. | |
| 187. |
Which of the circuits in figure (a to d) is the sum-of- products implementation of figure (e)? |
| A. | x=ab’+a’b |
| B. | x=(ab)’+ab |
| C. | x=(ab)’+a’b’ |
| D. | x=a’b’+ab |
| Answer» E. | |
| 188. |
Which of following are known as universal gates? |
| A. | nand & nor |
| B. | and & or |
| C. | xor & or |
| D. | ex-nor & xor |
| Answer» B. and & or | |
| 189. |
How many two input AND gates and two input OR gates are required to realize Y = BD + CE + AB? |
| A. | 3, 2 |
| B. | 4, 2 |
| C. | 1, 1 |
| D. | 2, 3 |
| Answer» B. 4, 2 | |
| 190. |
A full adder logic circuit will have |
| A. | two inputs and one output |
| B. | three inputs and three outputs |
| C. | two inputs and two outputs |
| D. | three inputs and two outputs |
| Answer» E. | |
| 191. |
How many two-input AND and OR gates are required to realize Y = CD+EF+G? |
| A. | 2, 2 |
| B. | 2, 3 |
| C. | 3, 3 |
| D. | 3, 2 |
| Answer» B. 2, 3 | |
| 192. |
The NOR gate output will be high if the two inputs are |
| A. | 00 |
| B. | 01 |
| C. | 10 |
| D. | 11 |
| Answer» B. 01 | |
| 193. |
How many AND gates are required to realize Y = CD + EF + G? |
| A. | 4 |
| B. | 5 |
| C. | 3 |
| D. | 2 |
| Answer» E. | |
| 194. |
Entries known as                                mapping. |
| A. | diagonal |
| B. | straight |
| C. | k |
| D. | boolean |
| Answer» B. straight | |
| 195. |
In case of XOR/XNOR simplification we have to look for the following |
| A. | diagonal adjacencies |
| B. | offset adjacencies |
| C. | straight adjacencies |
| D. | both diagonal and offset adjencies |
| Answer» E. | |
| 196. |
There are many situations in logic design in which simplification of logic expression is possible in terms of XOR and                                    operations. |
| A. | x-nor |
| B. | xor |
| C. | nor |
| D. | nand |
| Answer» B. xor | |
| 197. |
Using the transformation method you can realize any POS realization of OR-AND with only. |
| A. | xor |
| B. | nand |
| C. | and |
| D. | nor |
| Answer» E. | |
| 198. |
Don’t care conditions can be used for simplifying Boolean expressions in |
| A. | registers |
| B. | terms |
| C. | k-maps |
| D. | latches |
| Answer» D. latches | |
| 199. |
It should be kept in mind that don’t care terms should be used along with the terms that are present in |
| A. | minterms |
| B. | expressions |
| C. | k-map |
| D. | latches |
| Answer» B. expressions | |
| 200. |
Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given |
| A. | function |
| B. | value |
| C. | set |
| D. | word |
| Answer» B. value | |