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This section includes 289 Mcqs, each offering curated multiple-choice questions to sharpen your Digital Electronics knowledge and support exam preparation. Choose a topic below to get started.
1. |
Consider the following statements:
|
A. | 1 only |
B. | 1, 3 and 4 |
C. | 1, 2 and 4 |
D. | 2 and 3 only |
Answer» D. 2 and 3 only | |
2. |
For each of the positive edge-triggered JK flip-flop used in the following figure, the propagation delay is T.
|
A. | 1 |
B. | 2 |
C. | 3 |
D. | 4 |
Answer» C. 3 | |
3. |
Consider the following statements: For a Master-Slave JK flip-flop,
|
A. | 1, 2 and 3 |
B. | 1 and 2 only |
C. | 2 and 3 only |
D. | 3 and 4 only |
Answer» C. 2 and 3 only | |
4. |
In a JK flip-flop we have J = Q and K = 1 (shown in figure). Assuming the flip-flop was initially cleaned and then clocked for 6-pulses, the sequence at the Q will be |
A. | 010000 |
B. | 011001 |
C. | 010010 |
D. | 010101 |
Answer» E. | |
5. |
The architecture of a PLA device differs from that of a PROM device in the following
|
A. | The former has a fixed OR array while the latter has a programmable OR array |
B. | The former has a programmable AND array while the latter has a hard-wired AND array. |
C. | The former has larger number of AND gates in the AND array than the latter for a given number of variables. |
D. | The latter has a fixed OR array while the former has a programmable OR array. |
Answer» B. The former has a programmable AND array while the latter has a hard-wired AND array. | |
6. |
A Schmitt trigger
|
A. | Is a digital circuit that produces sinusoidal output regardless of the input waveform |
B. | Is a digital circuit that produces rectangular output regardless of the input waveform |
C. | Is a digital circuit that produces a trapezoidal output regardless of the input. |
D. | None of these |
Answer» C. Is a digital circuit that produces a trapezoidal output regardless of the input. | |
7. |
Simplify (X + Y) (X + Y) |
A. | X |
B. | Y |
C. | X + X |
D. | X (1 + Y) |
Answer» B. Y | |
8. |
The Boolean expression A + B + C is |
A. | Sum term |
B. | A literal term |
C. | A product term |
D. | A complement term |
Answer» E. | |
9. |
Which one of the following is not a valid rule of Boolean algebra? |
A. | A + 1 = 1 |
B. | A = |
C. | |
D. | AA = A |
E. | A + 0 = A |
Answer» C. | |
10. |
The Boolean expression A BC D is |
A. | Sum term |
B. | Product term |
C. | A literal term |
D. | Always 1 |
Answer» B. Product term | |
11. |
Determine the values of A, B, C that makes the sum term A + B + C equal to 0 |
A. | A = 1, B = 0, C = 0 |
B. | A = 1, B = 1, C = 0 |
C. | A = 0, B = 0, C = 1 |
D. | All of them |
Answer» D. All of them | |
12. |
The domain of expression ABCD + AB + CD + B is |
A. | A and D |
B. | B only |
C. | A, B, C, D |
D. | None of these |
Answer» C. A, B, C, D | |
13. |
The Boolean expression X = AB + CD represents |
A. | Two ORs ANDed together |
B. | A 4-input AND gate |
C. | Two ANDs ORed together |
D. | An exclusive OR |
Answer» D. An exclusive OR | |
14. |
Which of the following capabilities are available in a Universal Shift Register?
|
A. | 2 and 4 only |
B. | 1, 2 and 3 |
C. | 1, 2 and 4 |
D. | 1, 3 and 4 |
Answer» C. 1, 2 and 4 | |
15. |
Which of the following measurements can be done using a counter?
|
A. | 1 and 2 |
B. | 2 and 3 |
C. | 1 and 4 |
D. | 2 and 4 |
Answer» B. 2 and 3 | |
16. |
Consider the following statements regarding registers and latches:
|
A. | 1 only |
B. | 1 and 3 |
C. | 2 and 3 |
D. | 3 and 4 |
Answer» C. 2 and 3 | |
17. |
Match the following :
|
||||||||||||
A. | (i) (ii) (iii) (iv) | ||||||||||||
B. | (ii) (iii) (iv) (i) | ||||||||||||
C. | (iii) (i) (ii) (iv) | ||||||||||||
D. | (iv) (i) (iii) (ii) | ||||||||||||
Answer» E. | |||||||||||||
18. |
The Boolean expression for Y in the given logic diagram will be |
A. | Y = RS |
B. | Y = |
C. | Y = R + S |
D. | Y = |
E. | + |
Answer» E. + | |
19. |
The Boolean expression
|
A. | B |
Answer» E. | |
20. |
In the above case Y will be |
A. | 1 |
B. | 0 |
C. | 1 or 0 |
D. | None of these |
Answer» C. 1 or 0 | |
21. |
Match the following:
|
||||||||||||
A. | (i) (ii) (iii) (iv) | ||||||||||||
B. | (ii) (iii) (iv) (i) | ||||||||||||
C. | (iii) (iv) (i) (ii) | ||||||||||||
D. | (iv) (i) (ii) (iii) | ||||||||||||
Answer» C. (iii) (iv) (i) (ii) | |||||||||||||
22. |
(X+Y) ( X Z + Z). ( Y + X.Z)
|
A. | XYX |
B. | X+Y+Z |
C. | XY = YZ + ZX |
D. | 0 |
Answer» E. | |
23. |
In the circuit shown in Fig. the value of input P goes from 0 1 and that of Q goes from 1 0.
|
A. | Output (a) |
B. | Output (b) |
C. | Output (c) |
D. | Output (d) |
Answer» E. | |
24. |
The Boolean expression
|
A. | B(A + C) + ABC |
B. | A (B + C) |
C. | ABC |
Answer» B. A (B + C) | |
25. |
A positive going pulse is applied to an inverter. The time interval from the leading edge of the input to the leading edge of the output is 7 ns. This parameter is |
A. | Speed power product |
B. | Propagation delay t |
C. | Propagation delay t |
D. | |
E. | Pulse width |
Answer» C. Propagation delay t | |
26. |
With reference to the exclusive OR gate with many inputs, consider the following statements
|
A. | 1, 2 |
B. | 3, 4 |
C. | 1, 3 |
D. | 2, 4 |
Answer» B. 3, 4 | |
27. |
Minimum no. of NAND gates require to implement the logic Y = AB + A + B + C |
A. | 0 |
B. | 2 |
C. | 3 |
D. | 4 |
Answer» B. 2 | |
28. |
In the figure, as long as X1 = 1 and X2 = 1, the output Q remains |
A. | At 1 |
B. | At 0 |
C. | At its initial value |
D. | Unstable |
Answer» E. | |
29. |
Simplified form of ZX + Z XY is |
A. | Z ( |
B. | + Y) |
C. | Z + Y |
D. | Z (X + Y) |
E. | ZY + X |
Answer» D. Z (X + Y) | |
30. |
Number of NAND gates are required to realize the function
|
A. | 3 |
B. | 4 |
C. | 5 |
D. | 6 |
Answer» C. 5 | |
31. |
Which of the following are universal gates?
|
A. | 1 and 2 only |
B. | 1 and 3 only |
C. | 2 and 3 only |
D. | 1, 2, and 3 |
Answer» B. 1 and 3 only | |
32. |
The minimized expression for the given K-map (X = don't care) is |
A. | A + |
B. | C |
C. | B + AC |
D. | C + AB |
E. | ABC |
Answer» B. C | |
33. |
Which the Boolean function
|
A. | 1 |
B. | 0 |
C. | X |
D. | X |
Answer» B. 0 | |
34. |
A digital circuit which compares two numbers A3 A2A1 A0 and B3 B2 B1 B0 is shown below. To get the output
|
A. | 1010, 1010 |
B. | 0101, 0101 |
C. | 0010, 0010 |
D. | 1010, 1011 |
Answer» E. | |
35. |
What is the minimum number of NAND gates required to implement A + AB + AB C? |
A. | 0 |
B. | 1 |
C. | 4 |
D. | 7 |
Answer» B. 1 | |
36. |
Assume that only the X and Y logic inputs are available and their complements X and Y are not available. What is the minimum number of two input NAND gates required to implement X Y? |
A. | 2 |
B. | 3 |
C. | 4 |
D. | 5 |
Answer» D. 5 | |
37. |
For the circuit shown below the counter state (Q1 Q0) follow the sequence |
A. | 00, 01, 10, 11, 00 .......... |
B. | 00, 01, 10, 00, 01 .......... |
C. | 00, 01, 11, 00, 01 .......... |
D. | 00, 10, 11, 00, 10 .......... |
Answer» C. 00, 01, 11, 00, 01 .......... | |
38. |
Consider the following statements in Johnson counter:
|
A. | 1 and 2 |
B. | 2 and 3 |
C. | 1 and 3 |
D. | 1, 2 and 3 |
Answer» E. | |
39. |
Consider the following statements:
|
A. | 2 and 3 |
B. | 1 only |
C. | 2 and 4 |
D. | None of these |
Answer» D. None of these | |
40. |
Consider the following statements:
|
A. | 1, 2 and 3 |
B. | 2 and 3 only |
C. | 1 and 3 only |
D. | 1 and 2 only |
Answer» E. | |
41. |
Consider the following statements:
|
A. | 1 and 4 only |
B. | 2 and 3 only |
C. | 1 and 3 only |
D. | 3 and 4 only |
Answer» D. 3 and 4 only | |
42. |
Which of the following circuits come under the class of combinational logic circuits:
|
A. | 1 only |
B. | 3 and 4 |
C. | 4 and 5 |
D. | 1, 2 and 3 |
Answer» E. | |
43. |
Consider the following statements: A multiplexer
|
A. | 1, 2 and 4 |
B. | 2, 3 and 4 |
C. | 1, 3 and 4 |
D. | 1, 2 and 3 Answers with Explanatory |
Answer» D. 1, 2 and 3 Answers with Explanatory | |
44. |
A digital multiplexer can be used for which of the following?
|
A. | 1, 3 and 4 |
B. | 2, 3 and 4 |
C. | 1 and 2 only |
D. | 2 and 3 only |
Answer» D. 2 and 3 only | |
45. |
The Boolean functions can be expressed in canonical SOP (sum of products) and POS (product of sums) form. For the functions, Y = A + BC, which are such two forms |
A. | Y = (1, 2, 6, 7) and Y = (0, 2, 4) |
B. | Y = (1, 4, 5, 6, 7) and Y = (0, 2, 3) |
C. | Y = (1, 2, 5, 6, 7) and Y = (0, 1, 3) |
D. | Y = (1, 2, 4, 5, 6, 7) and Y= (0, 2, 3, 4) |
Answer» C. Y = (1, 2, 5, 6, 7) and Y = (0, 1, 3) | |
46. |
In addition of two binary variables A and B results into a SUM and a CARRY output. Consider the following expressions for the SUM and CARRY outputs.
|
A. | 1 and 2 |
B. | 2 and 3 |
C. | 2 and 4 |
D. | 1 and 4 |
Answer» C. 2 and 4 | |
47. |
One of the following is not a synchronous input with reference to flip-flops |
A. | J input in a J-K flip-flop |
B. | S input in an R-S flip-flop |
C. | PRESET input in a J-K flip-flop |
D. | D input in a D flip-flop |
Answer» D. D input in a D flip-flop | |
48. |
Bistable multivibrator is also known as |
A. | Binary |
B. | Flip-flop |
C. | Eceless Jordan circuit |
D. | All of these |
Answer» E. | |
49. |
Astable multivibrator is also known as |
A. | One shot multivibrator |
B. | Schmidt trigger |
C. | Free running multivibrator |
D. | Gating circuit |
Answer» D. Gating circuit | |
50. |
Following flip-flop is used to eliminate race around problem |
A. | RS flip-flop |
B. | Master Slave JK flip-flop |
C. | JK flip-flop |
D. | None of these |
Answer» C. JK flip-flop | |