Explore topic-wise MCQs in Engineering.

The Power PC can effectively execute up to ten instructions per clock cycle.

Convert 1731₈ to decimal.

Counters are generally decoded in order to determine their count state.

Which format requires fewer conductors?

Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)

A circuit that implements a combinational logic function by storing a list of output values that correspond to all possible input combinations is a(n) ________.

A logic probe is again applied to the pins of a 7421 IC with the following results. Is there a problem with the circuit and if so, what is the problem?

From the truth table below, determine the standard SOP expression.

The logic expression for a NOR gate is ________.

Once a signal is digitized, the information it contains does not ________ as it is processed.

A computer will use ASCII code to store information internally.

It is important to memorize logic symbols, Boolean equations, and truth tables for logic gates.

The output of an AND gate is HIGH when any input is HIGH.

Looping on a K-map always results in the elimination of:

The truth table for the SOP expression has how many input combinations?

is in the form of a sum-of-products expression.

In many cases, counters must be strobed in order to eliminate glitches.

Top-down design means that we start at the highest level of the hierarchy, or that the entire project is considered to exist in a closed dark box with inputs and outputs.

The frequency counter measures frequency by enabling a counter to count the number of pulses of the incoming waveform during a precisely specified period of time called the sampling time.

In the digital clock project, frequency prescaling is used to take a 1 pps input and transform it into a 60 pps timing signal.

The half-step sequence of a stepper motor is created by inserting a start with only one coil energized between full steps.

One of the first steps in any HDL project is to define its scope by knowing the nature of all the signals that are interconnected to pieces of the project.

CMOS is a more dominant IC technology than TTL.

A NAND gate has:

The 2's-complement system is to be used to add the signed binary numbers 11110010 and 11110011. Determine, in decimal, the sign and value of each number and their sum.

CMOS stands for "complementary metal-oxide semiconductors" and the FETs are normally enhancement mode devices.

When two or more inputs are active simultaneously, the process is called:

The number of data registers is:

Which of the following is not a basic element within the microprocessor?

In a flash analog-to-digital converter, the output of each comparator is connected to an input of a ________.

Which term applies to the maintaining of a given signal level until the next sampling?

An op-amp has very ________.

In a frequency counter, what happens at high frequencies when the sampling interval is too long?

Which of the following is not a computer functional block?

In a digital representation of voltages using an 8-bit binary code, how many values can be defined?

The Pentium can address ________.

Which of the following is not an enhancement to the Pentium that was unavailable in the 8086/8088?

Which bus is bidirectional?

Which is not a step in strategic planning for HDL development?

Which method bypasses the CPU for certain types of data transfer?

What does the major block of an HDL code emulation of a keypad include?

In the frequency counter, when is the new count stored in the display register?

What are two ways to remember the current state of a counter in VHDL?

In the digital clock project, what type of counter is used to count to 59 seconds?

Why should a real hardware functional test be performed on the HDL stepper motor design?

What is the result of taking more samples during the quantization process?

In the frequency counter, if the clock generator produces a 100 kHz system clock signal, how many decade counters are required to measure 1 Hz?

The accuracy of the frequency counter depends on the:

Which A/D conversion method has a fixed conversion time?

How are unwanted frequencies removed prior to digital conversion?