When an open occurs on the input of a TTL device, the output will ________.

go HIGH, since full voltage appears across an open

go LOW, because there is no current in an open circuit

react as if the open input were a HIGH

go HIGH, since full voltage appears across an open

still be good, if only the good inputs are used

Parity generation and checking is used to detect ________.

errors in arithmetic in computers

which of two numbers is greater

errors in binary data transmission

errors in arithmetic in computers

when a binary counter counts incorrectly

One method of troubleshooting involves ________ the circuit under test with a ________ or ________ and then observing the output to check for proper bit patterns.

exercising, stimulus, test pattern

2291 + Mcqs in Digital Electronics Page 33 McqOptions

1601.	The HIGH logic level for a standard TTL output must be at least ________.
A.	2.4 V
B.	2 V
C.	0.8 V
D.	5 V
Answer» B. 2 V

Discussion

1602.	The abbreviated designator for a HIGH input voltage is VIH.
A.	True
B.	False
Answer» B. False

Discussion

1603.	A current-sourcing transistor may also be referred to as a pull-down transistor.
A.	True
B.	False
Answer» C.

Discussion

1604.	Most TTL gates use the totem-pole output arrangement.
A.	True
B.	False
Answer» B. False

Discussion

1605.	The fan-out of CMOS gates is frequency dependent.
A.	True
B.	False
Answer» B. False

Discussion

1606.	The upper transistor of a totem-pole output is OFF when the gate output is low.
A.	True
B.	False
Answer» B. False

Discussion

1607.	The ________ prefix on IC's indicates a broader operating temperature range, and the devices are generally used by the military.
A.	54
B.	2N
C.	74
D.	TTL
Answer» B. 2N

Discussion

1608.	An unused input of a NAND gate can be left unconnected, pulled high by a pull-up resistor and tied together with another input and not change the logic output.
A.	True
B.	False
Answer» B. False

Discussion

1609.	When an open occurs on the input of a TTL device, the output will ________.
A.	go LOW, because there is no current in an open circuit
B.	react as if the open input were a HIGH
C.	go HIGH, since full voltage appears across an open
D.	still be good, if only the good inputs are used
Answer» C. go HIGH, since full voltage appears across an open

Discussion

1610.	The logic family with the highest maximum clock frequency is HS-TTL.
A.	True
B.	False
Answer» C.

Discussion

1611.	The output current capability for a HIGH output condition is called a source current.
A.	True
B.	False
Answer» B. False

Discussion

1612.	The largest truth table that can be implemented directly with an 8-line-to-1-line MUX has ________.
A.	3 rows
B.	4 rows
C.	8 rows
D.	16 rows
Answer» D. 16 rows

Discussion

1613.	Parity generation and checking is used to detect ________.
A.	which of two numbers is greater
B.	errors in binary data transmission
C.	errors in arithmetic in computers
D.	when a binary counter counts incorrectly
Answer» C. errors in arithmetic in computers

Discussion

1614.	The Boolean equation for the exclusive-OR function is ________.
A.	<img src="/_files/images/digital-electronics/digital-systems/fba4_1021a1.jpeg" align="center">
B.	<img src="/_files/images/digital-electronics/digital-systems/fba4_1021b1.jpeg" align="center">
C.	<img src="/_files/images/digital-electronics/digital-systems/fba4_1021c1.jpeg" align="center">
D.	<img src="/_files/images/digital-electronics/digital-systems/fba4_1021d1.jpeg" align="center">
Answer» E.

Discussion

1615.	The 74XX series TTL operates using saturated switching in which many of the transistors, when conducting, will be in the saturated condition.
A.	True
B.	False
Answer» B. False

Discussion

1616.	The principal advantage of MOS ICs over TTL ICs is their fast operating speed.
A.	True
B.	False
Answer» C.

Discussion

1617.	The CMOS series that is pin-compatible with the TTL family is the 4000 series.
A.	True
B.	False
Answer» C.

Discussion

1618.	The TTL HIGH level source current is higher than the LOW level sinking current.
A.	True
B.	False
Answer» C.

Discussion

1619.	Usually P-MOS and N-MOS circuits are identical with the exception of the voltage polarities.
A.	True
B.	False
Answer» B. False

Discussion

1620.	The major advantage of TTL logic circuits over CMOS is lower propagation delay.
A.	True
B.	False
Answer» B. False

Discussion

1621.	The data sheet for the 74 series of TTL ICs shows that Vcc has a range of 4.5 V to 5.5 V.
A.	True
B.	False
Answer» C.

Discussion

1622.	There are many applications in which analog data must be digitized and transferred into a computer's memory. The process by which the computer acquires these digitized analog data is referred to as ________.
A.	sampling
B.	multiplexing
C.	data acquisition
D.	prescaling
Answer» D. prescaling

Discussion

1623.	The output of the circuit in the given figure (a) at point X on figure (b) will be ________.
A.	1.011 V
B.	2.75 V
C.	1.011 V
D.	2.75 V
Answer» E.

Discussion

1624.	The stability of the ADC process can be improved by using a(n) ________ to hold the analog voltage constant while the A/D conversion is taking place.
A.	sample-and-hold circuit
B.	op-amp comparator
C.	NPN amp
D.	current loop
Answer» B. op-amp comparator

Discussion

1625.	The characteristic that a change of one binary step on the input of a DAC should cause exactly one step change on the output is called ________.
A.	resolution
B.	linearity
C.	monotonicity
D.	accuracy
Answer» D. accuracy

Discussion

1626.	Applying DeMorgan's theorem and Boolean algebra to the expression results in ________.
A.	<img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0040a.gif">
B.	<img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0040bu.png">
C.	<img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0040c.gif">
D.	<img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0040d.gif">
Answer» E.

Discussion

1627.	In Boolean algebra, A + 1 = 1.
A.	True
B.	False
Answer» B. False

Discussion

1628.	A half-adder does not have ________.
A.	carry in
B.	carry out
C.	two inputs
D.	all of the above
Answer» B. carry out

Discussion

1629.	The OR function is Boolean multiplication and the AND function is Boolean addition.
A.	True
B.	False
Answer» C.

Discussion

1630.	The Boolean expression for the logic circuit shown is _____.
A.	<img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0050a.gif">
B.	<img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0050b.gif">
C.	<img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0050c.gif">
D.	<img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0050d.gif">
Answer» D. <img src="/_files/images/digital-electronics/digital-fundamentals/cua4_0050d.gif">

Discussion

1631.	The product-of-sums (POS) is basically the ORing of ANDed terms.
A.	True
B.	False
Answer» C.

Discussion

1632.	In Boolean algebra, = A.
A.	True
B.	False
Answer» B. False

Discussion

1633.	The equation ________ cannot be further simplified.
A.	<img src="/_files/images/digital-electronics/digital-systems/fba4_1016a1.gif" align="center">
B.	<img src="/_files/images/digital-electronics/digital-systems/fba4_1016b1.gif" align="center">
C.	<img src="/_files/images/digital-electronics/digital-systems/fba4_1016c1.gif" align="center">
D.	<img src="/_files/images/digital-electronics/digital-systems/fba4_1016d1.gif" align="center">
Answer» B. <img src="/_files/images/digital-electronics/digital-systems/fba4_1016b1.gif" align="center">

Discussion

1634.	Single looping in groups of three is a common K-map simplification technique.
A.	True
B.	False
Answer» C.

Discussion

1635.	An encoder in which the highest and lowest value input digits are encoded simultaneously is known as a priority encoder.
A.	True
B.	False
Answer» C.

Discussion

1636.	Three select lines are required to address four data input lines.
A.	True
B.	False
Answer» C.

Discussion

1637.	A circuit that can convert one of ten numerical keys pressed on a keyboard to BCD is a ________.
A.	priority encoder
B.	decoder
C.	multiplexer
D.	demultiplexer
Answer» B. decoder

Discussion

1638.	In true sum-of-products expressions, the inversion signs cannot cover more than single variables in a term.
A.	True
B.	False
Answer» B. False

Discussion

1639.	A reliable method for eliminating decoder spikes is the technique called ________.
A.	strobing
B.	feeding
C.	wagging
D.	waving
Answer» B. feeding

Discussion

1640.	A decade counter will count through decimal ________.
A.	10
B.	9
C.	15
D.	0
Answer» C. 15

Discussion

1641.	One method of troubleshooting involves ________ the circuit under test with a ________ or ________ and then observing the output to check for proper bit patterns.
A.	checking, voltmeter, ohmmeter
B.	exercising, stimulus, test pattern
C.	testing, scope, logic analyzer
D.	smashing, hammer, axe
Answer» C. testing, scope, logic analyzer

Discussion

1642.	In VHDL, if we need to remember a value it must be stored in a ________.
A.	function
B.	type declaration
C.	variable
D.	process
Answer» B. type declaration

Discussion

1643.	The dc noise margins calculated using the proper values from a standard TTL data sheet are the worst-case margins. The typical dc noise margins are usually somewhat higher.
A.	True
B.	False
Answer» B. False

Discussion

1644.	The noise margin for TTL is 0.8 V.
A.	True
B.	False
Answer» C.

Discussion

1645.	Truth tables are great for listing all possible combinations of independent variables.
A.	True
B.	False
Answer» B. False

Discussion

1646.	The K-map in the figure below shows the correct implementation of the expression X = ACD + AB(CD + BC).
A.	True
B.	False
Answer» C.

Discussion

1647.	A square in the top row of a K-map is considered to be adjacent to its corresponding square in the bottom row.
A.	True
B.	False
Answer» B. False

Discussion

1648.	To implement the full-adder sum functions, two exclusive-OR gates can be used.
A.	True
B.	False
Answer» B. False

Discussion

1649.	The input at the 1, 2, 4, 8 inputs to a 4-line to 16-line decoder with active-low outputs is 1110. As a result, output line 7 is driven LOW.
A.	True
B.	False
Answer» C.

Discussion

1650.	The Boolean equation of the exclusive-NOR function is .
A.	True
B.	False
Answer» B. False

Discussion

Explore topic-wise MCQs in Engineering.

The HIGH logic level for a standard TTL output must be at least ________.

The abbreviated designator for a HIGH input voltage is VIH.

A current-sourcing transistor may also be referred to as a pull-down transistor.

Most TTL gates use the totem-pole output arrangement.

The fan-out of CMOS gates is frequency dependent.

The upper transistor of a totem-pole output is OFF when the gate output is low.

The ________ prefix on IC's indicates a broader operating temperature range, and the devices are generally used by the military.

An unused input of a NAND gate can be left unconnected, pulled high by a pull-up resistor and tied together with another input and not change the logic output.

When an open occurs on the input of a TTL device, the output will ________.

The logic family with the highest maximum clock frequency is HS-TTL.

The output current capability for a HIGH output condition is called a source current.

The largest truth table that can be implemented directly with an 8-line-to-1-line MUX has ________.

Parity generation and checking is used to detect ________.

The Boolean equation for the exclusive-OR function is ________.

The 74XX series TTL operates using saturated switching in which many of the transistors, when conducting, will be in the saturated condition.

The principal advantage of MOS ICs over TTL ICs is their fast operating speed.

The CMOS series that is pin-compatible with the TTL family is the 4000 series.

The TTL HIGH level source current is higher than the LOW level sinking current.

Usually P-MOS and N-MOS circuits are identical with the exception of the voltage polarities.

The major advantage of TTL logic circuits over CMOS is lower propagation delay.

The data sheet for the 74 series of TTL ICs shows that Vcc has a range of 4.5 V to 5.5 V.

There are many applications in which analog data must be digitized and transferred into a computer's memory. The process by which the computer acquires these digitized analog data is referred to as ________.

The output of the circuit in the given figure (a) at point X on figure (b) will be ________.

The stability of the ADC process can be improved by using a(n) ________ to hold the analog voltage constant while the A/D conversion is taking place.

The characteristic that a change of one binary step on the input of a DAC should cause exactly one step change on the output is called ________.

Applying DeMorgan's theorem and Boolean algebra to the expression results in ________.

In Boolean algebra, A + 1 = 1.

A half-adder does not have ________.

The OR function is Boolean multiplication and the AND function is Boolean addition.

The Boolean expression for the logic circuit shown is _____.

The product-of-sums (POS) is basically the ORing of ANDed terms.

In Boolean algebra, = A.

The equation ________ cannot be further simplified.

Single looping in groups of three is a common K-map simplification technique.

An encoder in which the highest and lowest value input digits are encoded simultaneously is known as a priority encoder.

Three select lines are required to address four data input lines.

A circuit that can convert one of ten numerical keys pressed on a keyboard to BCD is a ________.

In true sum-of-products expressions, the inversion signs cannot cover more than single variables in a term.

A reliable method for eliminating decoder spikes is the technique called ________.

A decade counter will count through decimal ________.

One method of troubleshooting involves ________ the circuit under test with a ________ or ________ and then observing the output to check for proper bit patterns.

In VHDL, if we need to remember a value it must be stored in a ________.

The dc noise margins calculated using the proper values from a standard TTL data sheet are the worst-case margins. The typical dc noise margins are usually somewhat higher.

The noise margin for TTL is 0.8 V.

Truth tables are great for listing all possible combinations of independent variables.

The K-map in the figure below shows the correct implementation of the expression X = ACD + AB(CD + BC).

A square in the top row of a K-map is considered to be adjacent to its corresponding square in the bottom row.

To implement the full-adder sum functions, two exclusive-OR gates can be used.

The input at the 1, 2, 4, 8 inputs to a 4-line to 16-line decoder with active-low outputs is 1110. As a result, output line 7 is driven LOW.

The Boolean equation of the exclusive-NOR function is .

One method of troubleshooting involves the circuit under test with a or and then observing the output to check for proper bit patterns.