2291 + Mcqs in Digital Electronics Page 22 McqOptions

1051.	Sample-and-hold circuits in A/D converters are designed to:
A.	sample and hold the output of the binary counter during the conversion process
B.	stabilize the comparator's threshold voltage during the conversion process
C.	stabilize the input analog signal during the conversion process
D.	sample and hold the D/A converter staircase waveform during the conversion process
Answer» D. sample and hold the D/A converter staircase waveform during the conversion process

Discussion

1052.	A binary-weighter resistor DAC is practical only up to a resolution of ________.
A.	10 bits
B.	2 bits
C.	8 bits
D.	4 bits
Answer» E.

Discussion

1053.	A single Schmitt trigger inverter is all that is needed to build a simple astable multivibrator.
A.	True
B.	False
Answer» C.

Discussion

1054.	For the XNOR gate truth table shown below, the values for w, x, y, and z are ____, ____, ____, and ____, respectively.
A.	1, 0, 0, 1
B.	0, 1, 0, 1
C.	1, 1, 1, 0
D.	1, 0, 0, 0
Answer» B. 0, 1, 0, 1

Discussion

1055.	The J-K flip-flop is a standard building block of clocked (sequential) logic circuits known as a ________.
A.	FUNCTION
B.	logic primitive
C.	VARIABLE
D.	PROCESS
Answer» C. VARIABLE

Discussion

1056.	A glitch that appears on the decoded output of a ripple counter is often difficult to see on an oscilloscope because ________.
A.	it is a random event
B.	it occurs less frequently than the normal decoded output
C.	it is very fast
D.	all of the above
Answer» E.

Discussion

1057.	Which is not part of a hard disk drive?
A.	Spindle
B.	Platter
C.	Read/write head
D.	Valve
Answer» E.

Discussion

1058.	Each programmable array logic (PAL) gate product is applied to an OR gate and, if combinational logic is desired, the product is ORed and then:
A.	the polarity fuse is restored
B.	sent to an inverter for output
C.	sent immediately to an output pin
D.	passed to the AND function for output
Answer» C. sent immediately to an output pin

Discussion

1059.	The GAL22V10 has 12 outputs pins and 10 input pins.
A.	True
B.	False
Answer» C.

Discussion

1060.	What is the purpose of a decoder's inputs?
A.	To allow the decoder to respond to the inputs to activate the correct output gate.
B.	To disable the decoder outputs so that all outputs will be inactive.
C.	To disable the inputs and activate all outputs.
D.	To allow the decoder to respond to the inputs to activate the correct output gate, and to disable the inputs and activate all outputs.
Answer» E.

Discussion

1061.	The programming technologies that are used in CPLD devices are all nonvolatile.
A.	True
B.	False
Answer» B. False

Discussion

1062.	The symbol shown below is an AND gate.
A.	True
B.	False
Answer» B. False

Discussion

1063.	Add the following BCD numbers. 0110 &nbsp 0111 &nbsp 1001 0101 &nbsp 1000 &nbsp 1000
A.	0000 1011 0000 1111 0001 0001
B.	0001 0001 0001 0101 0001 0001
C.	0000 1011 0000 1111 0001 0111
D.	0001 0001 0001 0101 0001 0111
Answer» E.

Discussion

1064.	A microcontroller is called a computer on a chip.
A.	True
B.	False
Answer» B. False

Discussion

1065.	The address-decoding scheme for a 16K-byte EPROM memory system requires a 1-to-8-address decoder when 4K 8 memory is used.
A.	True
B.	False
Answer» B. False

Discussion

1066.	When the term RAM is used with semiconductor memories, it usually means ________ as opposed to ROM.
A.	Random-Access Memory
B.	Read/Write Memory (RWM)
C.	flash memory
D.	temporary storage
Answer» C. flash memory

Discussion

1067.	How many pins are in an EDF10K70 package?
A.	70
B.	140
C.	240
D.	532
Answer» D. 532

Discussion

1068.	How many macrocells are in a MAX700S LAB?
A.	8
B.	16
C.	32
D.	64
Answer» C. 32

Discussion

1069.	Three characteristics of op amps make them almost ideal amplifiers: very high input impedance, very low impedance, and ________.
A.	very high voltage gain
B.	unlimited bandwidth
C.	a low slew rate
D.	very high current gain
Answer» B. unlimited bandwidth

Discussion

1070.	ECL gates are noted for their high frequency capability and small output voltage swing.
A.	True
B.	False
Answer» B. False

Discussion

1071.	D/A conversion is the process of taking a voltage or current and converting it to a digital code.
A.	True
B.	False
Answer» C.

Discussion

1072.	The serial format for transmitting binary information uses:
A.	a single conductor
B.	multiple conductors
C.	infrared technology
D.	fiber-optic
Answer» B. multiple conductors

Discussion

1073.	What is the minimum voltage required before a diode will allow current to flow between the cathode and the anode?
A.	0.7 V
B.	0.07 V
C.	4.3 V
D.	0.2 V
Answer» B. 0.07 V

Discussion

1074.	In a priority encoder, the input with the highest priority is represented on the output.
A.	True
B.	False
Answer» B. False

Discussion

1075.	Ten TTL loads per TTL driver is known as:
A.	noise immunity
B.	fan-out
C.	power dissipation
D.	propagation delay
Answer» C. power dissipation

Discussion

1076.	A monostable 555 timer has the following number of stable states:
A.	0
B.	1
C.	2
D.	3
Answer» C. 2

Discussion

1077.	Assume a 4-bit parallel in/serial out shift register is loaded with a binary number. How many clock pulses are required after the parallel load has occurred before the first bit in the sequence appears on the serial output line?
A.	0
B.	1
C.	2
D.	3
Answer» C. 2

Discussion

1078.	A J-K flip-flop excitation table lists the present state, the next state, and the J and K levels required to produce each transition.
A.	True
B.	False
Answer» B. False

Discussion

1079.	The 2147 4K 1 static RAM contains 4096 storage locations storing one bit each. ________ 2147 RAM memory chip(s) is/are needed to configure an 8K 8 memory.
A.	One
B.	Four
C.	Eight
D.	Sixteen
Answer» E.

Discussion

1080.	The distinction between CPLDs and FPGAs is ________.
A.	well known
B.	very small
C.	often fuzzy
D.	very large
Answer» D. very large

Discussion

1081.	The GAL16V8 has architecture that is very similar to the ________ device.
A.	PAL
B.	PROM
C.	PLD
D.	SPLD
Answer» B. PROM

Discussion

1082.	NOR gates can be used to construct AND gates.
A.	True
B.	False
Answer» B. False

Discussion

1083.	In the digital clock project, when it is 11:59:59, AND gate 1 detects that the tens of hours is 1 and the edge trigger clock moves the display to 12:00:00.
A.	True
B.	False
Answer» C.

Discussion

1084.	Incorrect codes are a form of output error for a DAC.
A.	True
B.	False
Answer» C.

Discussion

1085.	The ADD, CMP, and MUL instructions are all part of which type of instruction?
A.	Data transfer
B.	Arithmetic
C.	Bit manipulation
D.	Loops and jumps
Answer» C. Bit manipulation

Discussion

1086.	The JNZ, JA, and LOOP instructions are all part of which type of instruction?
A.	Data transfer
B.	Arithmetic
C.	Bit manipulation
D.	Loops and jumps
Answer» E.

Discussion

1087.	Instructions that allow direct control of the processor's flags are called ________ instructions.
A.	data transfer
B.	arithmetic
C.	bit manipulation
D.	processor control
Answer» E.

Discussion

1088.	The MOV, PUSH, and POP instructions are all part of which type of instruction?
A.	Data transfer
B.	Arithmetic
C.	Bit manipulation
D.	Loops and jumps
Answer» B. Arithmetic

Discussion

1089.	During a memory read operation, the CPU fetches ________.
A.	a program instruction
B.	an address
C.	data
D.	all of the above
Answer» E.

Discussion

1090.	In the digital clock project HDL, the 1 pps signal is used as a synchronous clock for all of the counters' stages, which are synchronously cascaded.
A.	True
B.	False
Answer» B. False

Discussion

1091.	In HDL, one of the strategies used in strategic planning is to find the speed requirements.
A.	True
B.	False
Answer» C.

Discussion

1092.	A very critical dimension in project management is the time your boss will give you to complete the HDL project.
A.	True
B.	False
Answer» B. False

Discussion

1093.	In the keypad HDL encoder, the data signal is used to combine the row and column encoder data to make a 4-bit value representing the key that was pressed.
A.	True
B.	False
Answer» B. False

Discussion

1094.	In the keypad HDL encoder, the ts bit array represents a tristate buffer.
A.	True
B.	False
Answer» B. False

Discussion

1095.	The principal advantage of the three-wire handshake on the GPIB is that it ________.
A.	is faster than two-wire methods
B.	allows fast and slow listeners on the same bus
C.	can be used over very long distances
D.	is compatible with the RS232C standard
Answer» C. can be used over very long distances

Discussion

1096.	In HDL, one of the strategies used in strategic planning is to find a way to test each piece of the project.
A.	True
B.	False
Answer» B. False

Discussion

1097.	In the VHDL code of the stepper motor, the cout outputs are bit_vector type because they are binary bit patterns.
A.	True
B.	False
Answer» B. False

Discussion

1098.	The number of data lines on the GPIB is ________.
A.	1
B.	4
C.	8
D.	16
Answer» D. 16

Discussion

1099.	In the digital clock project, a MOD-60 BCD counter is made from a MOD-10 counter cascaded to a MOD-6 BCD counter.
A.	True
B.	False
Answer» B. False

Discussion

1100.	The resolution of a DAC can be expressed as the ________.
A.	minimum output voltage
B.	number of bits that are converted to an analog output
C.	deviation of the output from a straight line
D.	difference between the expected and actual outputs
Answer» C. deviation of the output from a straight line

Discussion

Explore topic-wise MCQs in Engineering.

Sample-and-hold circuits in A/D converters are designed to:

A binary-weighter resistor DAC is practical only up to a resolution of ________.

A single Schmitt trigger inverter is all that is needed to build a simple astable multivibrator.

For the XNOR gate truth table shown below, the values for w, x, y, and z are ____, ____, ____, and ____, respectively.

The J-K flip-flop is a standard building block of clocked (sequential) logic circuits known as a ________.

A glitch that appears on the decoded output of a ripple counter is often difficult to see on an oscilloscope because ________.

Which is not part of a hard disk drive?

Each programmable array logic (PAL) gate product is applied to an OR gate and, if combinational logic is desired, the product is ORed and then:

The GAL22V10 has 12 outputs pins and 10 input pins.

What is the purpose of a decoder's inputs?

The programming technologies that are used in CPLD devices are all nonvolatile.

The symbol shown below is an AND gate.

Add the following BCD numbers. 0110 &amp;nbsp 0111 &amp;nbsp 1001 0101 &amp;nbsp 1000 &amp;nbsp 1000

A microcontroller is called a computer on a chip.

The address-decoding scheme for a 16K-byte EPROM memory system requires a 1-to-8-address decoder when 4K 8 memory is used.

When the term RAM is used with semiconductor memories, it usually means ________ as opposed to ROM.

How many pins are in an EDF10K70 package?

How many macrocells are in a MAX700S LAB?

Three characteristics of op amps make them almost ideal amplifiers: very high input impedance, very low impedance, and ________.

ECL gates are noted for their high frequency capability and small output voltage swing.

D/A conversion is the process of taking a voltage or current and converting it to a digital code.

The serial format for transmitting binary information uses:

What is the minimum voltage required before a diode will allow current to flow between the cathode and the anode?

In a priority encoder, the input with the highest priority is represented on the output.

Ten TTL loads per TTL driver is known as:

A monostable 555 timer has the following number of stable states:

Assume a 4-bit parallel in/serial out shift register is loaded with a binary number. How many clock pulses are required after the parallel load has occurred before the first bit in the sequence appears on the serial output line?

A J-K flip-flop excitation table lists the present state, the next state, and the J and K levels required to produce each transition.

The 2147 4K 1 static RAM contains 4096 storage locations storing one bit each. ________ 2147 RAM memory chip(s) is/are needed to configure an 8K 8 memory.

The distinction between CPLDs and FPGAs is ________.

The GAL16V8 has architecture that is very similar to the ________ device.

NOR gates can be used to construct AND gates.

In the digital clock project, when it is 11:59:59, AND gate 1 detects that the tens of hours is 1 and the edge trigger clock moves the display to 12:00:00.

Incorrect codes are a form of output error for a DAC.

The ADD, CMP, and MUL instructions are all part of which type of instruction?

The JNZ, JA, and LOOP instructions are all part of which type of instruction?

Instructions that allow direct control of the processor's flags are called ________ instructions.

The MOV, PUSH, and POP instructions are all part of which type of instruction?

During a memory read operation, the CPU fetches ________.

In the digital clock project HDL, the 1 pps signal is used as a synchronous clock for all of the counters' stages, which are synchronously cascaded.

In HDL, one of the strategies used in strategic planning is to find the speed requirements.

A very critical dimension in project management is the time your boss will give you to complete the HDL project.

In the keypad HDL encoder, the data signal is used to combine the row and column encoder data to make a 4-bit value representing the key that was pressed.

In the keypad HDL encoder, the ts bit array represents a tristate buffer.

The principal advantage of the three-wire handshake on the GPIB is that it ________.

In HDL, one of the strategies used in strategic planning is to find a way to test each piece of the project.

In the VHDL code of the stepper motor, the cout outputs are bit_vector type because they are binary bit patterns.

The number of data lines on the GPIB is ________.

In the digital clock project, a MOD-60 BCD counter is made from a MOD-10 counter cascaded to a MOD-6 BCD counter.

The resolution of a DAC can be expressed as the ________.

For the XNOR gate truth table shown below, the values for w, x, y, and z are , , , and , respectively.

Add the following BCD numbers. 0110 &nbsp 0111 &nbsp 1001 0101 &nbsp 1000 &nbsp 1000