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MCQOPTIONS
This section includes 646 Mcqs, each offering curated multiple-choice questions to sharpen your Computer Science Engineering (CSE) knowledge and support exam preparation. Choose a topic below to get started.
| 301. |
Which of the following combinations cannot be combined into K-map groups? |
| A. | corners in the same row |
| B. | corners in the same column |
| C. | diagonal corners |
| D. | overlappin g combinati ons |
| Answer» D. overlappin g combinati ons | |
| 302. |
Which of the following statements accurately represents the two BEST methods of logic circuit simplification? |
| A. | boolean algebra and karnaugh mapping |
| B. | karnaugh mapping and circuit waveform analysis |
| C. | actual circuit trial and error evaluation and waveform analysis |
| D. | boolean algebra and actual circuit trial and error evaluation |
| Answer» B. karnaugh mapping and circuit waveform analysis | |
| 303. |
The implementation of simplified sum-of-products expressions may be easily implemented into actual logic circuits using all universal                gates with little or no increase in circuit complexity. (Select the response for the blank space that will BEST make the statement true.) |
| A. | and/or |
| B. | nand |
| C. | nor |
| D. | or/and |
| Answer» C. nor | |
| 304. |
How many 1-of-16 decoders are required for decoding a 7-bit binary number? |
| A. | 5 |
| B. | 6 |
| C. | 7 |
| D. | 8 |
| Answer» E. | |
| 305. |
Convert BCD 0001 0111 to binary. |
| A. | 10101 |
| B. | 10001 |
| C. | 10010 |
| D. | 11000 |
| Answer» D. 11000 | |
| 306. |
Convert BCD 0001 0010 0110 to binary. |
| A. | 1111110 |
| B. | 1111000 |
| C. | 1111101 |
| D. | 1111111 |
| Answer» B. 1111000 | |
| 307. |
For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be LOW. What is the status of the Y output? |
| A. | low |
| B. | high |
| C. | don\t care |
| D. | cannot be determine d |
| Answer» B. high | |
| 308. |
The function of a multiplexer is |
| A. | to decode information |
| B. | to select 1 out of n input data sources and to transmit it to single channel |
| C. | to transit data on n lines |
| D. | to perform serial to parallel conversion |
| Answer» C. to transit data on n lines | |
| 309. |
A combinational circuit is one in which the output depends on the |
| A. | input combination at the time |
| B. | input combination and the previous output |
| C. | input combination at that time and the previous input combination |
| D. | present output and the previous output |
| Answer» B. input combination and the previous output | |
| 310. |
What is the minimum number of 2 input NAND gates required to implement the function F = (x'+y') (z+w) |
| A. | 6 |
| B. | 5 |
| C. | 4 |
| D. | 3 |
| Answer» D. 3 | |
| 311. |
A toggle operation cannot be performed using a single |
| A. | nor gate |
| B. | and gate |
| C. | nand gate |
| D. | xor gate |
| Answer» C. nand gate | |
| 312. |
Which table shows the electrical state of a digital circuit's output for every possible combination of electrical states in the inputs ? |
| A. | function table |
| B. | truth table |
| C. | routing table |
| D. | ascii table |
| Answer» B. truth table | |
| 313. |
The output of NOR gate is |
| A. | high if all of its inputs are high |
| B. | low if all of its inputs are low |
| C. | high if all of its inputs are low |
| D. | high if only of its inputs is low |
| Answer» D. high if only of its inputs is low | |
| 314. |
Which combination of gates does not allow the implementation of an arbitrary boolean function? |
| A. | or gates and and gates only |
| B. | or gates and exclusive or gate only |
| C. | or gates and not gates only |
| D. | nand gates only |
| Answer» B. or gates and exclusive or gate only | |
| 315. |
An OR gate can be imagined as |
| A. | switches connected in series |
| B. | switches connected in parallel |
| C. | mos transistors connected in series |
| D. | none of these |
| Answer» C. mos transistors connected in series | |
| 316. |
A positive AND gate is also a negative |
| A. | nand gate |
| B. | nor gate |
| C. | and gate |
| D. | or gate |
| Answer» E. | |
| 317. |
The EXCLUSIVE NOR gate is equivalent to which gate followed by an inverter ? |
| A. | or gate |
| B. | and |
| C. | nand |
| D. | xor |
| Answer» E. | |
| 318. |
Which of the following gates are added to the inputs of the OR gate to convert it to the NAND gate ? |
| A. | not |
| B. | and |
| C. | or |
| D. | xor |
| Answer» B. and | |
| 319. |
Which of the following gates is known as coincidence detector ? |
| A. | and gate |
| B. | or gate |
| C. | not gate |
| D. | nand gate |
| Answer» B. or gate | |
| 320. |
Which of the following gates would output 1 when one input is 1 and other input is 0 ? |
| A. | or gate |
| B. | and gate |
| C. | nand gate |
| D. | and gate |
| Answer» E. | |
| 321. |
Which of the following expressions is not equivalent to X ' ? |
| A. | x nand x |
| B. | x nor x |
| C. | x nand 1 |
| D. | x nor 1 |
| Answer» E. | |
| 322. |
The time required for a pulse to decrease from 90 to 10 per cent of its maximum value is called |
| A. | rise time |
| B. | decay time |
| C. | binary level transition period |
| D. | propagatio n delay |
| Answer» C. binary level transition period | |
| 323. |
The maximum frequency at which digital data can be applied to gate is called |
| A. | operating speed |
| B. | propagation speed |
| C. | binary level transaction period |
| D. | charging time |
| Answer» B. propagation speed | |
| 324. |
The time required for a pulse to change from 10 to 90 percent of its maximum value is called |
| A. | rise time iz |
| B. | decay time |
| C. | propagation time |
| D. | operating speed |
| Answer» B. decay time | |
| 325. |
What is the minimum number of two-input NAND gates used to perform the function of two input OR gate ? |
| A. | one |
| B. | two |
| C. | three |
| D. | four |
| Answer» D. four | |
| 326. |
The time required for a gate or inverter to change its state is called |
| A. | rise time iz |
| B. | decay time |
| C. | propagation time |
| D. | charging time |
| Answer» D. charging time | |
| 327. |
In which of the following gates, the output is 1, if and only if at least one input is 1? |
| A. | nor |
| B. | and |
| C. | or |
| D. | nand |
| Answer» D. nand | |
| 328. |
Select one of the following statements that best describes the parity method of error detection: |
| A. | best suited for detecting single-bit errors in transmitted codes. |
| B. | best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. |
| C. | a and b |
| D. | none of the above |
| Answer» B. best suited for detecting double-bit errors that occur during the transmission of codes from one location to another. | |
| 329. |
One application of a digital multiplexer is to facilitate: |
| A. | code conversion |
| B. | parity checking |
| C. | parallel-to- serial data conversion |
| D. | data generation |
| Answer» D. data generation | |
| 330. |
Most demultiplexers facilitate which of the following? |
| A. | decimal to hexadecimal |
| B. | single input, multiple outputs |
| C. | ac to dc |
| D. | odd parity to even parity |
| Answer» C. ac to dc | |
| 331. |
A multiplexed display: |
| A. | accepts data inputs from one line and passes this data to multiple output lines |
| B. | uses one display to present two or more pieces of information |
| C. | accepts data inputs from multiple lines and passes this data to multiple output lines |
| D. | accepts data inputs from several lines and multiplexe s this input data to four bcd lines |
| Answer» C. accepts data inputs from multiple lines and passes this data to multiple output lines | |
| 332. |
Which one of the following set of gates are best suited for 'parity' checking and 'parity' generation. |
| A. | and, or, not gates |
| B. | ex-nor or ex-or gates |
| C. | nand gates |
| D. | nor gates |
| Answer» C. nand gates | |
| 333. |
The inverter OR-gate and AND gate are called deeision-making elements because they can recognize some input while disregarding others. A gate |
| A. | words,high |
| B. | bytes,low |
| C. | bytes,high |
| D. | character,l ow |
| Answer» B. bytes,low | |
| 334. |
How many inputs are required for a 1-of-10 BCD decoder? |
| A. | 4 |
| B. | 8 |
| C. | 10 |
| D. | 1 |
| Answer» B. 8 | |
| 335. |
What are the two types of basic adder circuits? |
| A. | half adder and |
| B. | half adder |
| C. | asynchronou |
| D. | one\s |
| Answer» B. half adder | |
| 336. |
The number of control lines for 32 to 1 multiplexer is |
| A. | 4 |
| B. | 16 |
| C. | 5 |
| D. | 6 |
| Answer» D. 6 | |
| 337. |
Adders |
| A. | adds 2 bits |
| B. | is called so because a full adder involves two half-adders |
| C. | needs two input and generates two output |
| D. | all of these |
| Answer» E. | |
| 338. |
The selector inputs to an arithmetic-logic unit (ALU) determine the: |
| A. | selection of |
| B. | arithmetic |
| C. | data word |
| D. | clock |
| Answer» C. data word | |
| 339. |
In which of the following adder circuits, the carry look ripple delay is eliminated ? |
| A. | half adder |
| B. | full adder |
| C. | parallel adder |
| D. | carry- look- ahead adder |
| Answer» D. carry- look- ahead adder | |
| 340. |
Which of the following circuit can be used as parallel to serial converter ? |
| A. | multiplexer |
| B. | demultiplexe r |
| C. | decoder |
| D. | digital counter |
| Answer» B. demultiplexe r | |
| 341. |
A combinational logic circuit which generates a particular binary word or number is |
| A. | decoder |
| B. | multiplexer |
| C. | encoder |
| D. | demultiple xer |
| Answer» B. multiplexer | |
| 342. |
If a logic gates has four inputs, then total number of possible input combinations is |
| A. | 4 |
| B. | 8 |
| C. | 16 |
| D. | 32 |
| Answer» D. 32 | |
| 343. |
What is the largest number of data inputs which a data selector with two control inputs can have ? |
| A. | 2 |
| B. | 4 |
| C. | 6 |
| D. | 8 |
| Answer» C. 6 | |
| 344. |
A comparison between serial and parallel adder reveals that serial order |
| A. | is slower |
| B. | is faster |
| C. | operates at the same speed as parallel adder |
| D. | is more complicate d |
| Answer» B. is faster | |
| 345. |
How many truth tables can be made from one function table ? |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | any no |
| Answer» C. 3 | |
| 346. |
How many lines the truth table for a four-input NOR gate would contain to cover all possible input combinations ? |
| A. | 4 |
| B. | 8 |
| C. | 12 |
| D. | 16 |
| Answer» E. | |
| 347. |
The digital multiplexer is basically a combination logic circuit to perform the operation |
| A. | and-and |
| B. | or-or |
| C. | and-or |
| D. | or-and |
| Answer» D. or-and | |
| 348. |
Parallel adders are |
| A. | combinational logic circuits |
| B. | sequential logic circuits |
| C. | both (a) and (b) |
| D. | none of these |
| Answer» C. both (a) and (b) | |
| 349. |
How many full adders are required to construct an m-bit parallel adder ? |
| A. | m/2 |
| B. | m-1 |
| C. | m |
| D. | m+1 |
| Answer» C. m | |
| 350. |
A demultiplexer is used to |
| A. | route the data from single input to one of many outputs |
| B. | select data from several inputs and route it to single output |
| C. | perform serial to parallel conversion |
| D. | all of these |
| Answer» B. select data from several inputs and route it to single output | |