MCQOPTIONS
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MCQOPTIONS
This section includes 1271 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics & Communication Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 301. |
The number FF in hexadecimal system is equivalent to number __________ in decimal system. |
| A. | 240 |
| B. | 239 |
| C. | HIGH from 4 to 0 |
| D. | LOW from 0 to 4 |
| Answer» C. HIGH from 4 to 0 | |
| 302. |
In a digital system there are three inputs ABC. Output should be high when atleast two inputs are high. Then output = |
| A. | AB + BC + AC |
| B. | ABC + ABC + A BC + ABC |
| C. | AB + BC + AC |
| D. | AB + BC + AC |
| Answer» C. AB + BC + AC | |
| 303. |
A binary adder has |
| A. | one half adder |
| B. | one half adder and 2 full adders |
| C. | two half adders |
| D. | one half adder and many full adders |
| Answer» E. | |
| 304. |
Status register in the 8156 contains information about |
| A. | both (a) and (b) |
| B. | none of the above |
| C. | 0.2 V |
| D. | 0.4 V |
| Answer» D. 0.4 V | |
| 305. |
A combination circuit is one in which the output depends on |
| A. | input combination at that time |
| B. | input combination and previous output |
| C. | input combination and previous input |
| D. | present output and previous output |
| Answer» B. input combination and previous output | |
| 306. |
In 8085 microprocessor, what is the length of IR (instruction register)? |
| A. | 6 bits |
| B. | 8 bits |
| C. | 12 bits |
| D. | 16 bits |
| Answer» C. 12 bits | |
| 307. |
TTL inverter has |
| A. | one input |
| B. | two inputs |
| C. | one or two inputs |
| D. | three inputs |
| Answer» C. one or two inputs | |
| 308. |
If the ladder reference voltage is 2 V, then minimum comparator resolution required is |
| A. | 0.125 V |
| B. | 1.25 V |
| C. | 12.5 V |
| D. | 0 |
| Answer» B. 1.25 V | |
| 309. |
For the DAC in the given figure VO= |
| A. | 10 V |
| B. | 5 V |
| C. | 4 V |
| D. | 8 V |
| Answer» B. 5 V | |
| 310. |
In a 3 input NAND gate, the number of states in which output is 1 equals |
| A. | 6 |
| B. | 5 |
| C. | 0.833 kHz |
| D. | 1.0 kHz |
| Answer» C. 0.833 kHz | |
| 311. |
The MOS symbols shown indicates: that it is depletion typethat it is enhancement typethat it is n channelthat it is p channelthat electrons flow from D to Sthat holes flow from D to S The only true statements are |
| A. | 1, 3, 6 |
| B. | 2, 4, 6 |
| C. | 1, 3, 5 |
| D. | 2, 3, 6 |
| Answer» B. 2, 4, 6 | |
| 312. |
A 4 bit synchronous counter has flip flops having propagation delay of 50 ns each and AND gates having propagation delay of 20 ns each. The maximum frequency of clock pulses can be |
| A. | 14.3 MHz |
| B. | 5 MHz |
| C. | 4 |
| D. | 2 |
| Answer» D. 2 | |
| 313. |
An 8-bit microprocessor has 16 bit address bus A0 - A15. The processor addresses a 1-K byte memory chip as shown. The address range for the chip is |
| A. | (F00F)H TO (F40E)H |
| B. | (F000)H TO (F3FF)H |
| C. | (F100)H TO (F4FF)H |
| D. | (F700)H TO (FAFF)H |
| Answer» C. (F100)H TO (F4FF)H | |
| 314. |
An SR flip flop can be built using |
| A. | NOR gate only |
| B. | NAND gate only |
| C. | either NOR or NAND gates |
| D. | neither NOR nor NAND gates |
| Answer» D. neither NOR nor NAND gates | |
| 315. |
In the given figure shows a 4 bit serial in parallel out right shift register. The initial contents as shown are 0110. After 3 clock pulses the contents will be |
| A. | 0 |
| B. | 101 |
| C. | 1010 |
| D. | 1111 |
| Answer» D. 1111 | |
| 316. |
The Boolean expression for the sub-class (Q) of all electronic instruments which are measuring instruments or are non-digital instruments with battery supply is |
| A. | Q = X(Y + Z) |
| B. | Q = X + YZ |
| C. | Q = XY + Z |
| D. | Q = XY + Z |
| Answer» C. Q = XY + Z | |
| 317. |
Assertion (A): The use of 2's complement has simplified the computer hardware for arithmetic operations Reason (R): 2's complement is obtained by adding 1 to 1's complement. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 318. |
For the circuit of the given figure, the output equation is |
| A. | Y = ABCD |
| B. | Y = AB + CD |
| C. | Y = A + BCD |
| D. | Y = ABC + D |
| Answer» C. Y = A + BCD | |
| 319. |
11011 in gray code = __________ . |
| A. | 100102 |
| B. | 111112 |
| C. | 111002 |
| D. | 100012 |
| Answer» B. 111112 | |
| 320. |
The Central Processing Unit (CPU) of the 16-processor system developed by hardware and software teams of C-DOT, Bangalore is configured around |
| A. | Motorola 68020 |
| B. | Motorola 68040 |
| C. | Intel 80386 |
| D. | Intel 80486 |
| Answer» B. Motorola 68040 | |
| 321. |
Which of the following is error correcting code? |
| A. | EBCDIC |
| B. | Gray |
| C. | Hamming |
| D. | ASCII |
| Answer» D. ASCII | |
| 322. |
The characteristic equation of an SR flip-flop in given by |
| A. | Qn+1 = S + RQn |
| B. | Qn+1 = RQn + SQn |
| C. | Qn+1 = S + RQn |
| D. | Qn+1 = S + RQn |
| Answer» E. | |
| 323. |
Octal 16 is equal to decimal |
| A. | 13 |
| B. | 14 |
| C. | 15 |
| D. | 16 |
| Answer» C. 15 | |
| 324. |
In 8085 microprocessor, an active low signal INTA is not needed from up service which of the following interrupt request? |
| A. | TRAP |
| B. | INTR |
| C. | RST 7.5 |
| D. | RST 5.5 |
| Answer» B. INTR | |
| 325. |
The minimum number of comparators required to build an 8 bit flash ADC is |
| A. | 8 |
| B. | 63 |
| C. | 255 |
| D. | 256 |
| Answer» D. 256 | |
| 326. |
Shifting digits from left to right and vice versa is needed in |
| A. | storing numbers |
| B. | arithmetic operations |
| C. | counting |
| D. | storing and counting |
| Answer» C. counting | |
| 327. |
In the given figure shows a negative logic AND gate. If positive logic is used this gate is equivalent to |
| A. | AND gate |
| B. | OR gate |
| C. | NOR gate |
| D. | NAND gate |
| Answer» D. NAND gate | |
| 328. |
In the NMOS inverter |
| A. | the driver and achieve load are enhancement type |
| B. | the driver is enhancement type and load depletion type |
| C. | both driver and load are depletion type |
| D. | the driver and load are depletion type |
| Answer» C. both driver and load are depletion type | |
| 329. |
Consider the following twoStatements 1: stable multivibrator can be used for generating square wave.Statements 2 : stable multivibrator can be used for storing binary information. |
| A. | only statement 1 is correct |
| B. | only statement 2 is correct |
| C. | both statements are correct |
| D. | both the statements 1 and 2 are not correct |
| Answer» D. both the statements 1 and 2 are not correct | |
| 330. |
The abbreviation DTL stands for |
| A. | Digital Timing Logic |
| B. | Diode Transistor Logic |
| C. | Dynamic Transient Logic |
| D. | Delayed Tracking Logic |
| Answer» C. Dynamic Transient Logic | |
| 331. |
In a 4 bit full adder how many half adders and OR gates are required |
| A. | 8 and 4 |
| B. | 7 and 4 |
| C. | 7 and 3 |
| D. | 8 and 3 |
| Answer» D. 8 and 3 | |
| 332. |
A 2 bit BCD D/A converter is a weighted resistor type with ER = 1V, R = 1 MΩ and Rf = 10KΩ then Resolution in percent and volt is __________ . |
| A. | 1%, 1 mv |
| B. | 10%, 10 mv |
| C. | 10%, 1 mv |
| D. | 1%, 10 mv |
| Answer» E. | |
| 333. |
Is Schottky TTL, Schottky diode is used primary to |
| A. | prevent saturation of the transistor |
| B. | saturate the transistor |
| C. | act as a switch |
| D. | act as a controlling switch |
| Answer» B. saturate the transistor | |
| 334. |
Which device changes parallel data to serial data? |
| A. | Decoder |
| B. | Multiplexer |
| C. | Demultiplexer |
| D. | Flip flop |
| Answer» C. Demultiplexer | |
| 335. |
Assertion (A): Tristate logic is used for bus oriented systems Reason (R): The outputs of a tristate logic are 0, 1 and indeterminant. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» D. A is false, R is true | |
| 336. |
To convert SR latch to D latch |
| A. | connect both S and R to D |
| B. | connect D to S directly and D to R through inverter |
| C. | connect D to R directly and D to S through inverter |
| D. | connect S to D and leave R open |
| Answer» C. connect D to R directly and D to S through inverter | |
| 337. |
In 8085 microprocessor, if interrupt service requests have been received from all of the following interrupts, then which one will be serviced first? |
| A. | RST 5.5 |
| B. | RST 6.5 |
| C. | RST 7.5 |
| D. | None |
| Answer» D. None | |
| 338. |
In a JK master slave flip flop |
| A. | master is clocked when clock is high and slave is clocked when clock is low |
| B. | master is clocked when clock is low and slave is clocked when clock is high |
| C. | Qn+1 = JQn + KQn |
| D. | Qn+1 = JQn + KQn |
| Answer» D. Qn+1 = JQn + KQn | |
| 339. |
The basic shift register operations are |
| A. | serial in - serial out |
| B. | serial in - parallel out |
| C. | parallel in - serial out |
| D. | all of the above |
| Answer» E. | |
| 340. |
A 3 bit binary adder should use |
| A. | 3 full adders |
| B. | 2 full adders and 1 half adder |
| C. | 1 full adder and 2 half adders |
| D. | 3 half adders |
| Answer» C. 1 full adder and 2 half adders | |
| 341. |
A NOR gate has 3 inputs A, B, C. For which combination of inputs is output HIGH |
| A. | A = B = C = 0 |
| B. | A = B = C = 1 |
| C. | A = B = 1 and C = 0 |
| D. | A = C = 1 and B = 0 |
| Answer» B. A = B = C = 1 | |
| 342. |
When microprocessor processes both positive and negative numbers, the representation used is |
| A. | l's complement |
| B. | 2's complement |
| C. | signed binary |
| D. | any of the above |
| Answer» C. signed binary | |
| 343. |
In Schottky TTL, a Schottky diode is used for |
| A. | forming the gate |
| B. | connecting the resistor |
| C. | clamping of the basic collector junction |
| D. | none of the above |
| Answer» D. none of the above | |
| 344. |
A monostable multivibrator has |
| A. | no stable state |
| B. | one stable state |
| C. | two stable state |
| D. | none of the above |
| Answer» C. two stable state | |
| 345. |
The function Y = AC + BD + EF is |
| A. | Hybrid |
| B. | none of the above |
| C. | Both A and R are correct and R is correct explanation of A |
| D. | Both A and R are correct but R is not correct explanation of A |
| Answer» C. Both A and R are correct and R is correct explanation of A | |
| 346. |
Assertion (A): The propagation delay in ECL is minimum Reason (R): Transistors used in ECL switch between active and cutoff regions. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» B. Both A and R are correct but R is not correct explanation of A | |
| 347. |
Minimum number of J-K flip-flop needed to construct a BCD counter is |
| A. | 2 |
| B. | 3 |
| C. | 4 |
| D. | 5 |
| Answer» D. 5 | |
| 348. |
The accuracy of A/D conversion is generally |
| A. | |
| B. | ± LSB |
| Answer» B. ¬± LSB | |
| 349. |
Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is |
| A. | TTL |
| B. | CMOS |
| C. | ECL |
| D. | TTLLS |
| Answer» D. TTLLS | |
| 350. |
A 16 bit binary adder has |
| A. | 16 half adders |
| B. | 16 full adders |
| C. | one half adders and 15 full adders |
| D. | 8 half adders and eight full adders |
| Answer» D. 8 half adders and eight full adders | |