MCQOPTIONS
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MCQOPTIONS
This section includes 1271 Mcqs, each offering curated multiple-choice questions to sharpen your Electronics & Communication Engineering knowledge and support exam preparation. Choose a topic below to get started.
| 501. |
Out of latch and flip flop, which has clock input? |
| A. | Latch only |
| B. | Flip flop only |
| C. | Both latch and flip flop |
| D. | None |
| Answer» C. Both latch and flip flop | |
| 502. |
In a three variable K map four adjacent cells give |
| A. | single variable term |
| B. | two variable term |
| C. | three variable term |
| D. | either (a) or (b) |
| Answer» B. two variable term | |
| 503. |
Which of the following statements is not true in regard to storage time of a transistor? |
| A. | The transistor is in active region |
| B. | Both junctions are forward-biased |
| C. | The collector injects electrons or holes into the base region |
| D. | It is the time taken by the carriers to leave the base region |
| Answer» B. Both junctions are forward-biased | |
| 504. |
The given figure shows a K-map for a Boolean function. The number of essential prime implicants is |
| A. | 4 |
| B. | 5 |
| C. | 6 |
| D. | 8 |
| Answer» B. 5 | |
| 505. |
"Micro-programming" is a technique |
| A. | for programming the microprocessors |
| B. | for writing small programs efficiently |
| C. | for programming the control steps of a computer |
| D. | for programming output/input |
| Answer» D. for programming output/input | |
| 506. |
The parity bit is |
| A. | always 1 |
| B. | always 0 |
| C. | 1 or 0 |
| D. | none of the above |
| Answer» D. none of the above | |
| 507. |
Symmetrical square wave of time period 100 μs can be obtained from square wave of time period 10 μs by using |
| A. | divide by 5 circuit |
| B. | divide by 2 circuit |
| C. | divide by 5 circuit followed by divide by 2 circuit |
| D. | BCD counter |
| Answer» D. BCD counter | |
| 508. |
Assertion (A): In totem pole output the output impedance is low.Reason (R): TTL gate with active pull up should not be used in wired AND connection. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» C. A is true, R is false | |
| 509. |
Out of SR and JK flip flops, which is susceptible to race condition? |
| A. | SR |
| B. | JK |
| C. | Both SR and JK |
| D. | None of the above |
| Answer» B. JK | |
| 510. |
A(A + B) = |
| A. | A |
| B. | A B |
| C. | AB |
| D. | AB |
| Answer» D. AB | |
| 511. |
Read cycle is always followed by (during instructions execution) |
| A. | read cycle |
| B. | write cycle |
| C. | delete signal |
| D. | none of these |
| Answer» C. delete signal | |
| 512. |
A 16-megabit dynamic random access memory (DRAM) is an integrated circuit capable of storing __________ characters (bytes). |
| A. | 1048567 |
| B. | 16 x 1024 x 106 |
| C. | 16 x 106 |
| D. | 2.1 x lo6 |
| Answer» E. | |
| 513. |
The logical expression Y = A + AB is equivalent to |
| A. | Y = AB |
| B. | Y = AB |
| C. | Y = A + B |
| D. | Y = A + B |
| Answer» E. | |
| 514. |
A transistor is operated as non-saturated switch to eliminate |
| A. | turn on time |
| B. | turn off time |
| C. | storage time |
| D. | delay time |
| Answer» C. storage time | |
| 515. |
A 16 x 8 ROM stores these words in its first four locations, as given below. Which of this represents 3 CH in hexadecimal? |
| A. | R0 = 1110 0010 |
| B. | R1 = 0101 0111 |
| C. | R2 = 0011 1100 |
| D. | R3 = 1011 1111 |
| Answer» D. R3 = 1011 1111 | |
| 516. |
A 0 to 6 counter consist of 3 flip-flop and a combinational circuit of 2 input gates. The combinational circuit consist of |
| A. | one AND gate |
| B. | one OR gate |
| C. | one AND and One OR |
| D. | two AND gate |
| Answer» E. | |
| 517. |
Assertion (A): A binary number is a string of zeros and ones only Reason (R): The base in a binary system is 2 |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» B. Both A and R are correct but R is not correct explanation of A | |
| 518. |
A seven bit (even parity) code 0010001 may have error. The correct code is |
| A. | 10001 |
| B. | 1110001 |
| C. | 11001 |
| D. | 1111110 |
| Answer» D. 1111110 | |
| 519. |
Bipolar IC memories are fabricated using |
| A. | high density versions of the bipolar transistor flip-flop |
| B. | low density versions of the unipolar transistor flip-flop |
| C. | high density versions of the MOSFET |
| D. | low density versions of the MOSFET |
| Answer» B. low density versions of the unipolar transistor flip-flop | |
| 520. |
Logic pulser |
| A. | generates short duration pulses |
| B. | generates long duration pulses |
| C. | generates sinusoidal voltage |
| D. | generates ideal pulses |
| Answer» B. generates long duration pulses | |
| 521. |
The hex number EB16 represents binary number of |
| A. | 11101011 |
| B. | 10010110 |
| C. | 10101100 |
| D. | 11101011 |
| Answer» B. 10010110 | |
| 522. |
In following figure, the initial contents of the 4-bit serial in parallel out, right shift, shift register as shown in figure are 0110. After 3 clock pulses the contents of the shift register will be |
| A. | 0 |
| B. | 101 |
| C. | 1010 |
| D. | 1110 |
| Answer» D. 1110 | |
| 523. |
The output of a full adder is |
| A. | SUM |
| B. | CARRY |
| C. | SUM and CARRY |
| D. | none of the above |
| Answer» C. SUM and CARRY | |
| 524. |
Serial in-serial out shift register can be built using D flip flops. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 525. |
For the K map in the given figure, the simplified expression is |
| A. | xl x2 x4 + x2 x4 + x1 x3 |
| B. | x2 x4 + x2 x4 + x1 x3 |
| C. | x1 x2 x4 + xl x2 + x3 x4 + x2x4 |
| D. | x1 x2 + x2 x3 + x3x4 |
| Answer» C. x1 x2 x4 + xl x2 + x3 x4 + x2x4 | |
| 526. |
Which of the following logic no resistors are used? |
| A. | CMOS |
| B. | TTL |
| C. | 4 n sec ECL |
| D. | 8 sec ECL |
| Answer» B. TTL | |
| 527. |
In the DRAM cell in the figure is the Vt of the NMOSFET is 1 V. For the following three combinations of WL and BL voltages. |
| A. | 5 V, 3 V, 7 V |
| B. | 4 V, 3 V, 4 V |
| C. | 5 V, 5 V, 5 V |
| D. | 4 V, 4 V, 4 V |
| Answer» D. 4 V, 4 V, 4 V | |
| 528. |
Assertion (A): A PROM can be used as a synchronous counter Reason (R): Each memory location in a PROM can be read synchronously. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |
| 529. |
A + (B . C) = |
| A. | A . B + C |
| B. | A . B + A . C |
| C. | A |
| D. | (A + B) . (A + C) |
| Answer» E. | |
| 530. |
In two level logic, logic race does not occur. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 531. |
For a MOD-12 counter, the FF has a tpd = 60 ns The NAND gate has a tpd of 25 n sec. The clock frequency is |
| A. | 3.774 MHz |
| B. | > 3.774 MHz |
| C. | < 3.774 MHz |
| D. | 4.167 MHz |
| Answer» B. > 3.774 MHz | |
| 532. |
The address to which a software or hardware restart branches is known as |
| A. | Vector location |
| B. | SID |
| C. | SOD |
| D. | TRAP |
| Answer» B. SID | |
| 533. |
It is desired to display the digit 7 using a seven segment display. The LEDs to be turned on are |
| A. | a, b, c |
| B. | b, c, d |
| C. | c, d, e |
| D. | a, b, d |
| Answer» B. b, c, d | |
| 534. |
Schmitt trigger is used for wave shaping. |
| A. | 1 |
| B. | |
| Answer» B. | |
| 535. |
Binary number 101101 when converted to its 2's complement will become |
| A. | 101.01 |
| B. | 100.1 |
| C. | 100.1 |
| D. | 101.1 |
| Answer» C. 100.1 | |
| 536. |
The op amp is used in |
| A. | A/D converters |
| B. | D/A converters |
| C. | both (a) and (b) |
| D. | shift registers |
| Answer» D. shift registers | |
| 537. |
Assuming accumulator contain A 64 and the carry is set (1). What will register A and (CY) contain after ACI 0 A4 H? |
| A. | 4 AH, 0 |
| B. | 4 AH, 1 |
| C. | 4 BH, 0 |
| D. | 4 BH, 1 |
| Answer» E. | |
| 538. |
The circuit given below is a |
| A. | counter |
| B. | digital to analog converter |
| C. | two-bit series-to-parallel converter |
| D. | analog-to digital converter |
| Answer» D. analog-to digital converter | |
| 539. |
In a 3 input NOR gate, the number of states in which output is 1 equals |
| A. | 1 |
| B. | 2 |
| C. | 3 |
| D. | 4 |
| Answer» B. 2 | |
| 540. |
Which has the lowest propagation delay time? |
| A. | ECL |
| B. | TTL |
| C. | CMOS |
| D. | PMOS |
| Answer» B. TTL | |
| 541. |
A 4 bit modulo 16 ripple counter uses JK flip-flops. If the propagation delay of each FF is 50 ns. The max. clock frequency that can be used is equal to |
| A. | 20 MHz |
| B. | 10 MHz |
| C. | 5 MHz |
| D. | 4 MHz |
| Answer» D. 4 MHz | |
| 542. |
In 8085 microprocessor, how many lines are there in address bus? |
| A. | 6 |
| B. | 8 |
| C. | 12 |
| D. | 16 |
| Answer» E. | |
| 543. |
0.10112 = __________ . |
| A. | 0.68751 |
| B. | 0.68001 |
| C. | 0.01001 |
| D. | 0.50001 |
| Answer» B. 0.68001 | |
| 544. |
Microprocessors were introduced in the year |
| A. | 1951 |
| B. | 1961 |
| C. | 1971 |
| D. | 1981 |
| Answer» D. 1981 | |
| 545. |
A D-flip-flop is |
| A. | dial type flip-flop |
| B. | delay flip-flop |
| C. | differential flip-flop |
| D. | digital flip-flop |
| Answer» C. differential flip-flop | |
| 546. |
If number of information bits is 4, the parity bits in Hamming code are located at bit positions __________ from the LSB. |
| A. | 1, 2, 5 |
| B. | 1, 2, 4 |
| C. | 1, 2, 3 |
| D. | 1, 2 |
| Answer» C. 1, 2, 3 | |
| 547. |
If a microcomputer has a 64 K memory; what is the hexadecimal notations for the last memory location? |
| A. | 1111 |
| B. | 1A1A |
| C. | EEEF |
| D. | FFFF |
| Answer» E. | |
| 548. |
If a RAM has 34 bits in its MAR and 16 bits its MAR, then its capacity will be |
| A. | 32 GB |
| B. | 16 GB |
| C. | 32 MB |
| D. | 16 MB |
| Answer» D. 16 MB | |
| 549. |
Minimum no. of 2 I/P NAND gate required to implement the Boolean function Z = ABC, assuming that A, B and C are available is |
| A. | 2 |
| B. | 3 |
| C. | 5 |
| D. | 6 |
| Answer» D. 6 | |
| 550. |
Assertion (A): CMOS devices have very high speed.Reason (R): CMOS devices have very small physical size and simple geometry. |
| A. | Both A and R are correct and R is correct explanation of A |
| B. | Both A and R are correct but R is not correct explanation of A |
| C. | A is true, R is false |
| D. | A is false, R is true |
| Answer» E. | |