Explore topic-wise MCQs in Vlsi.

This section includes 6 Mcqs, each offering curated multiple-choice questions to sharpen your Vlsi knowledge and support exam preparation. Choose a topic below to get started.

1.

When both nMOS and pMOS transistors of CMOS logic gates are ON, the output is:

A. 1 or Vdd or HIGH state
B. 0 or ground or LOW state
C. Crowbarred or Contention(X)
D. None of the mentioned
Answer» D. None of the mentioned
2.

When both nMOS and pMOS transistors of CMOS logic design are in OFF condition, the output is:

A. 1 or Vdd or HIGH state
B. 0 or ground or LOW state
C. High impedance or floating(Z)
D. None of the mentioned
Answer» D. None of the mentioned
3.

The CMOS logic circuit for NOR gate is:

A. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9a.png"><img alt="The CMOS logic circuit for NOR gate - option a" class="alignnone size-full wp-image-162016" height="157" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9a.png" width="181"/></a>
B. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9b.png"><img alt="The CMOS logic circuit for NOR gate - option b" class="alignnone size-full wp-image-162017" height="157" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9b.png" width="181"/></a>
C. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9c.png"><img alt="The CMOS logic circuit for NOR gate - option c" class="alignnone size-full wp-image-162018" height="161" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9c.png" width="185"/></a>
D. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9d.png"><img alt="The CMOS logic circuit for NOR gate - option d" class="alignnone size-full wp-image-162019" height="161" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9d.png" width="185"/></a>
Answer» B. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9b.png"><img alt="The CMOS logic circuit for NOR gate - option b" class="alignnone size-full wp-image-162017" height="157" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q9b.png" width="181"/></a>
4.

The CMOS logic circuit for NAND gate is:

A. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q5a.png"><img alt="The CMOS logic circuit for NAND gate - option a" class="alignnone size-full wp-image-162011" height="154" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q5a.png" width="139"/></a>
B. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q5b.png"><img alt="The CMOS logic circuit for NAND gate - option b" class="alignnone size-full wp-image-162013" height="156" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q5b.png" width="142"/></a>
C. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q5c.png"><img alt="The CMOS logic circuit for NAND gate - option c" class="alignnone size-full wp-image-162014" height="159" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q5c.png" width="145"/></a>
D. None of the mentioned
Answer» B. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q5b.png"><img alt="The CMOS logic circuit for NAND gate - option b" class="alignnone size-full wp-image-162013" height="156" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q5b.png" width="142"/></a>
5.

The truth table which accurately explains the operation of CMOS not gate is:

A. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4a.png"><img alt="Truth table which accurately explains the operation of CMOS not gate - option a" class="alignnone size-full wp-image-162007" height="61" sizes="(max-width: 648px) 100vw, 648px" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4a.png" srcset="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4a.png 648w, https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4a-300x28.png 300w" width="648"/></a>
B. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4b.png"><img alt="Truth table which accurately explains the operation of CMOS not gate - option b" class="alignnone size-full wp-image-162008" height="63" sizes="(max-width: 648px) 100vw, 648px" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4b.png" srcset="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4b.png 648w, https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4b-300x29.png 300w" width="648"/></a>
C. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4c.png"><img alt="Truth table which accurately explains the operation of CMOS not gate - option c" class="alignnone size-full wp-image-162009" height="64" sizes="(max-width: 648px) 100vw, 648px" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4c.png" srcset="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4c.png 648w, https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4c-300x30.png 300w" width="648"/></a>
D. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4d.png"><img alt="Truth table which accurately explains the operation of CMOS not gate - option d" class="alignnone size-full wp-image-162010" height="62" sizes="(max-width: 648px) 100vw, 648px" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4d.png" srcset="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4d.png 648w, https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q4d-300x29.png 300w" width="648"/></a>
Answer» E.
6.

The CMOS gate circuit of NOT gate is:

A. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q3a.png"><img alt="CMOS gate circuit of NOT gate - option a" class="alignnone size-full wp-image-162003" height="148" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q3a.png" width="113"/></a>
B. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q3b.png"><img alt="CMOS gate circuit of NOT gate - option b" class="alignnone size-full wp-image-162004" height="149" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q3b.png" width="117"/></a>
C. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q3c.png"><img alt="CMOS gate circuit of NOT gate - option c" class="alignnone size-full wp-image-162005" height="151" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q3c.png" width="117"/></a>
D. <a href="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q3d.png"><img alt="CMOS gate circuit of NOT gate - option d" class="alignnone size-full wp-image-162006" height="153" src="https://www.sanfoundry.com/wp-content/uploads/2017/05/vlsi-questions-answers-cmos-logic-gates-q3d.png" width="129"/></a>
Answer» E.