In four bit dynamic shift register output is obtaine?

parallel output at inverters 1,3,5,7

parallel output at inverters 1,5,8

parallel output at all inverters

parallel output at inverter 2,4,6,8

Which are easier to design?

asynchronous sequential circuits

asynchronous sequential circuits with buffers

Clocked sequential circuits are

two phase non overlapping clock

four phase non overlapping clock

15 + Mcqs in Clocked Sequential Circuits in Vlsi Page 1 McqOptions

1.	For signals which are updated frequently _____ is used.
A.	static storage
B.	dynamic storage
C.	static and dynamic storage
D.	buffer
Answer» C. static and dynamic storage

Discussion

2.	Non inverting dynamic register storage cell consists of _________ transistors for nMOS and _________ for CMOS.
A.	six, eight
B.	eight, six
C.	five, six
D.	six, five
Answer» B. eight, six

Discussion

3.	Inverting dynamic register element consists of __________ transistors for nMOS and _________ for CMOS.
A.	two, three
B.	three, two
C.	three, four
D.	four, three
Answer» D. four, three

Discussion

4.	As the temperature is increased, storage time ____________
A.	halved
B.	doubled
C.	does not change
D.	tripled
Answer» B. doubled

Discussion

5.	___________ is used to drive high capacitance load.
A.	single polar capability
B.	bipolar capability
C.	tripolar capability
D.	bi and tri polar capability
Answer» C. tripolar capability

Discussion

6.	FOR_SIGNALS_WHICH_ARE_UPDATED_FREQUENTLY_______IS_USED?$
A.	static storage
B.	dymanic storage
C.	static and dynamic storage
D.	buffer
Answer» C. static and dynamic storage

Discussion

7.	In four bit dynamic shift register output is obtaine?
A.	parallel output at inverters 1,3,5,7
B.	parallel output at inverters 1,5,8
C.	parallel output at all inverters
D.	parallel output at inverter 2,4,6,8
Answer» E.

Discussion

8.	In a four bit dynamic shift register basic nMOS transistor or inverters are connected in
A.	series
B.	cascade
C.	parallel
D.	series and parallel
Answer» C. parallel

Discussion

9.	Register cell consists of
A.	inverter
B.	pass transistor
C.	both of the mentioned
D.	none of the mentioned
Answer» D. none of the mentioned

Discussion

10.	Non inverting dynamic register storage cell consists of ____ transistors for nMOS and _____ for CMOS
A.	six, eight
B.	eight, six
C.	five, six
D.	six, five
Answer» B. eight, six

Discussion

11.	Inverting dynamic register element consists of _____ transistors for nMOS and ____ for CMOS
A.	two, three
B.	three, two
C.	three, four
D.	four, three
Answer» D. four, three

Discussion

12.	As the temperature is increased, storage time ______
A.	halved
B.	doubled
C.	does not change
D.	tripled
Answer» B. doubled

Discussion

13.	_____ is used to drive high capacitance load
A.	single polar capability
B.	bipolar capability
C.	tripolar capability
D.	bi and tri polar capability
Answer» C. tripolar capability

Discussion

14.	Which are easier to design?
A.	clocked circuits
B.	asynchronous sequential circuits
C.	clocked circuits with buffer
D.	asynchronous sequential circuits with buffers
Answer» B. asynchronous sequential circuits

Discussion

15.	Clocked sequential circuits are
A.	two phase overlapping clock
B.	two phase non overlapping clock
C.	four phase overlapping clock
D.	four phase non overlapping clock
Answer» C. four phase overlapping clock

Discussion

Explore topic-wise MCQs in Vlsi.

For signals which are updated frequently _____ is used.

Non inverting dynamic register storage cell consists of _ transistors for nMOS and _ for CMOS.

Inverting dynamic register element consists of __ transistors for nMOS and _ for CMOS.

As the temperature is increased, storage time ____________

___________ is used to drive high capacitance load.

FOR_SIGNALS_WHICH_ARE_UPDATED_FREQUENTLY_______IS_USED?$

In four bit dynamic shift register output is obtaine?

In a four bit dynamic shift register basic nMOS transistor or inverters are connected in

Register cell consists of

Non inverting dynamic register storage cell consists of transistors for nMOS and _ for CMOS

Inverting dynamic register element consists of _ transistors for nMOS and for CMOS

As the temperature is increased, storage time ______

_____ is used to drive high capacitance load

Which are easier to design?

Clocked sequential circuits are

Explore topic-wise MCQs in Vlsi.

For signals which are updated frequently _____ is used.

Non inverting dynamic register storage cell consists of _________ transistors for nMOS and _________ for CMOS.

Inverting dynamic register element consists of __________ transistors for nMOS and _________ for CMOS.

As the temperature is increased, storage time ____________

___________ is used to drive high capacitance load.

FOR_SIGNALS_WHICH_ARE_UPDATED_FREQUENTLY_______IS_USED?$

In four bit dynamic shift register output is obtaine?

In a four bit dynamic shift register basic nMOS transistor or inverters are connected in

Register cell consists of

Non inverting dynamic register storage cell consists of ____ transistors for nMOS and _____ for CMOS

Inverting dynamic register element consists of _____ transistors for nMOS and ____ for CMOS

As the temperature is increased, storage time ______

_____ is used to drive high capacitance load

Which are easier to design?

Clocked sequential circuits are

Non inverting dynamic register storage cell consists of _ transistors for nMOS and _ for CMOS.

Inverting dynamic register element consists of __ transistors for nMOS and _ for CMOS.

Non inverting dynamic register storage cell consists of transistors for nMOS and _ for CMOS

Inverting dynamic register element consists of _ transistors for nMOS and for CMOS