Explore topic-wise MCQs in Vhdl.

This section includes 15 Mcqs, each offering curated multiple-choice questions to sharpen your Vhdl knowledge and support exam preparation. Choose a topic below to get started.

1.

A signal is driven by two signals b and c. How the value of b and c will be resolved to calculate the value of a?

A. By short circuiting both driver
B. By open circuiting one driver
C. By AND operation between two drivers
D. By NOT operation of both drivers
Answer» B. By open circuiting one driver
Discussion
2.

Refer to the VHDL code given below, which of the following signal is driven by multiple drivers?

A. d
B. c
C. b
D. aView Answer
Answer» E.
Discussion
3.

Which function is used to create a single value for multiple driver signals?

A. Resolution function
B. Package
C. Concurrent assignments
D. Sequential assignments
Answer» B. Package
Discussion
4.

VHDL can’t handle multiply driven signals.

A. True
B. False
Answer» C.
Discussion
5.

Which of the circuit is described by following VHDL code?

A. AND gate
B. OR gate
C. MUX 2:1
D. DEMUX 1:2View Answer
Answer» D. DEMUX 1:2View Answer
Discussion
6.

a < = b after 10ns; In this statement the keyword ‘after’ is used for introducing delay.

A. True
B. False
Answer» B. False
Discussion
7.

The most basic form of behavioral modeling in VHDL is _______

A. IF statements
B. Assignment statements
C. Loop statements
D. WAIT statements
Answer» C. Loop statements
Discussion
8.

WHICH_FUNCTION_IS_USED_TO_CREATE_A_SINGLE_VALUE_FOR_MULTIPLE_DRIVER_SIGNALS??$

A. Resolution function
B. Package
C. Concurrent assignments
D. Sequential assignments
Answer» E.
Discussion
9.

VHDL can’t handle multiply driven signals?#

A. True
B. False
Answer» B. False
Discussion
10.

What is the use of simulation deltas in VHDL code?

A. To create delays in simulation
B. To assign values to signals
C. To order some events
D. Evaluate assignment statements
Answer» C. To order some events
Discussion
11.

The main problem with behavioral modeling is ________

A. Asynchronous delays
B. Simulation
C. No delay
D. Supports single driver only
Answer» D. Supports single driver only
Discussion
12.

AND gate

A. OR gate
B. MUX 2:1
C. DEMUX 1:2
Answer» B. MUX 2:1
Discussion
13.

a

A. True
B. False
Answer» B. False
Discussion
14.

For any concurrent assignment statement, which of the following is true?

A. The statement is executed once
B. The statement is executed twice
C. The value of left operand is assigned to right operand
D. The statement is executed as many times as the value changes
Answer» E.
Discussion
15.

The most basic form of behavioral modeling in VHDL is_______

A. IF statements
B. Assignment statements
C. Loop statements
D. WAIT statements
Answer» C. Loop statements
Discussion