Match List-I with List-II and select the correct answer using the code given below the lists:List-IList-II a. Pipelined ALU i. RISC b. Simpler compiler ii. CISC c. Separate data and instruction caches iii. Mixed RISC-CISC d. Lesser cycles per instruction

a - i, b - ii, c - iii, d - iii

a - iii, b - ii, c - iii, d - i

a - iii, b - iii, c - ii, d - i

a - iii, b - iii, c - iii, d - i

Match List-I with List-II and select the correct answer using the code

1.	Match List-I with List-II and select the correct answer using the code given below the lists:List-IList-II a. Pipelined ALU i. RISC b. Simpler compiler ii. CISC c. Separate data and instruction caches iii. Mixed RISC-CISC d. Lesser cycles per instruction
A.	a - iii, b - ii, c - iii, d - i
B.	a - i, b - ii, c - iii, d - iii
C.	a - iii, b - iii, c - ii, d - i
D.	a - iii, b - iii, c - iii, d - i
Answer» B. a - i, b - ii, c - iii, d - iii

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Match List-I with List-II and select the correct answer using the code given below the lists:List-IList-II a. Pipelined ALU i. RISC b. Simpler compiler ii. CISC c. Separate data and instruction caches iii. Mixed RISC-CISC d. Lesser cycles per instruction

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